Hardware Security Evaluation Engineer

This is a non-renewable post for a limited duration of 4 years and open for the specific needs of a National Project. Accordingly, the external candidate selected for this post will continue to be considered an external candidate for the purposes of any future applications to the Agency.

Location

ESEC, Redu, Belgium

Description

Hardware Security Evaluation Engineer in the System Security Section (TEC-SES), End-to-End Systems Division, Systems Department, Directorate of Technology, Engineering and Quality.

The System Security Section is responsible for end-to-end system security engineering for the Agency’s missions, projects and activities across space, ground and user segments and communication links, at system, subsystem, element and equipment levels. Its responsibilities span the mission lifecycle from the study phase and definition of requirements to design, development, security integration and verification, and security service preparation, across the full stack, from the physical to the application layer.

To fulfil these functions, the System Security Section defines and conducts the associated research and development (R&D) activities and studies and implements the necessary security engineering standards.

Using its security laboratory facilities, the System Security Section performs vulnerability assessments across all areas within its remit and proposes detection methods and mitigation and protection measures using security assessment tools and equipment.

This position will support a third-party activity aimed at developing a national hardware security evaluation capability.

Duties

Your tasks and responsibilities will include:

• supporting the Project Manager by providing recommendations, guidance and plans for test and evaluation laboratory capability development and technologies for hardware security evaluation;
• regular reporting to the Project Manager on the status of the duties assigned under the project;
• engaging directly with and advising national customers and ESA experts on options for developing and maturing hardware security evaluation capabilities;
• deriving technical requirements and reviewing, assessing and evaluating project proposals, including the security design, development, implementation, qualification and validation;
• fostering new security application areas for multidisciplinary activities, placing emphasis on innovative concepts, cutting-edge technologies and system architectures in the field of hardware security evaluation;
• supporting laboratory activities as required;
• continuously following technological and scientific developments relevant to the position, particularly emerging threats, exploits and industry trends;
• contributing, as requested, to other technical activities beyond the main project within your area of expertise.

Technical competencies

Hardware attacks and fault injection

Side-channel analysis and physical security testing

Embedded systems and hardware security architecture

Cryptographic hardware security

Hardware security evaluation and certification standards

Hardware evaluation laboratory technologies and technical analysis

Behavioural competencies

Result Orientation

Operational Efficiency

Fostering Cooperation

Relationship Management

Continuous Improvement

Forward Thinking

For more information, please refer to the ESA Core Behavioural Competencies guidebook

Education and professional experience

A master’s degree in a relevant field and, in principle, three years of relevant professional experience are required for this post. Alternatively, candidates with a bachelor’s degree and an additional four years of relevant professional experience may be considered.

Additional requirements

Hands-on experience in hardware hacking, exploitation and security assessment across IT and embedded-system technologies, including but not limited to:

• side channel attacks;
• voltage fault injection;
• clock fault injection;
• electromagnetic fault injection;
• optical fault injection;
• timing attacks;
• simple, differential and correlation power analysis;
• debug port attacks.

In-depth knowledge of:

• embedded system characterisation, hardware component imaging and probing techniques;
• fault characterisation and fault model development;
• boot loaders and their weaknesses;
• trusted platform modules, trusted execution environments and other similar technologies, including attacks and mitigations.

Understanding of design principles for hardware analysis purposes, including:

• symmetric cryptographic algorithms;
• asymmetric pre-quantum cryptographic algorithms;
• asymmetric post-quantum cryptographic algorithms.

In-depth knowledge of:

• applying relevant security and certification standards, including FIPS 140-3, Common Criteria, ENISA, ISO and ETSI, for testing and certification purposes;
• embedded systems and their interfaces and protocols;
• software programming.

Experience of firmware extraction and reversing techniques is desirable.

Diversity, Equity and Inclusiveness

ESA is an equal opportunity employer, committed to achieving diversity within the workforce and creating an inclusive working environment. We therefore welcome applications from all qualified candidates irrespective of gender, sexual orientation, ethnicity, religious beliefs, age, disability or other characteristics.

At the Agency we value diversity, and we welcome people with disabilities. Whenever possible, we seek to accommodate individuals with disabilities by providing the necessary support at the workplace. The Human Resources Department can also provide assistance during the recruitment process. If you would like to discuss this further, please contact us via email at [email protected].

Important Information and Disclaimer

In principle, recruitment will be within the advertised grade band (A2-A4). However, if the selected candidate has less than four years of relevant professional experience following the completion of the master’s degree, the position may be filled at A1 level.

Applicants must be eligible to access information, technology, and hardware which is subject to European or US export control and sanctions regulations & eligible to acquire the security clearance by their national security administrations.

During the recruitment process, the Agency may request applicants to undergo selection tests. Additionally, successful candidates will need to undergo basic screening before appointment, which will be conducted by an external background screening service, in compliance with the European Space Agency's security procedures.

Note that ESA is in the process of transitioning to a Matrix setup, which could lead to organisational changes affecting this position.

The information published on ESA’s careers website regarding working conditions is correct at the time of publication. It is not intended to be exhaustive and may not address all questions you would have.

Nationality and Languages

Please note that applications are only considered from nationals of one of the following States: Austria, Belgium, Czechia, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Luxembourg, the Netherlands, Norway, Poland, Portugal, Romania, Slovenia, Spain, Sweden, Switzerland, the United Kingdom and Canada, Cyprus, Latvia, Lithuania and Slovakia.

According to the ESA Convention, staff shall be recruited on the basis of their qualifications, taking into account an adequate distribution of posts among nationals of the Member States.

The working languages of the Agency are English and French. A good knowledge of one of these is required. Knowledge of another Member State language would be an asset.