Software Engineer, Compiler (Front-end)
Confirmed on the employer's own hiring board on Oct 16, 2026. First seen by Alion on Aug 19, 2026.
About FuriosaAI
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon.
Our vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence for every enterprise.
About the Role
The compiler is central to FuriosaAI's mission to build high-performance, energy-efficient AI systems. The front end is where the compiler meets the outside world. Its mission spans three areas:
Faithful Ingestion: Translate models from external frameworks - with their evolving semantics, dynamic behaviors, and framework-specific constructs - into a precise internal representation that the rest of the compiler can reason about with confidence.
Structural Optimization: Reshape programs at the graph level - through operator fusion, constant propagation, and shape resolution - so that downstream compilation stages receive the cleanest possible input.
Tensor-Level Kernel Language Design: Design and evolve a programming language that enables users to directly author models optimized for FuriosaAI hardware. As the user-level interface to the compiler's internal IR and DSL, this language should maximize hardware performance while remaining intuitive for a broad range of users.
We are looking for someone who thinks in systems, designs for extensibility, and brings rigor and clarity across the stack - from model ingestion to user-facing language design.
Key Responsibilities
Design and implement the front-end pipeline that transforms models from major deep learning frameworks such as PyTorch into the compiler's internal IR.
Develop graph-level optimizations, including operator fusion, constant folding, shape inference, and layout transformations.
Build extensible model ingestion structures that can accommodate new architectures such as LLM, VLA, and Multimodal models, and custom operators, while maintaining consistency and correctness.
Design and evolve a tensor-level kernel language that exposes the capabilities of the internal IR and DSL through a consistent, well-abstracted user interface.
Establish verification mechanisms to ensure correctness throughout the translation process.
Collaborate with software teams and language users to maximize end-to-end compilation quality and refine the language design based on real-world usage patterns.
Minimum Qualifications
Bachelor's degree in Computer Science, Mathematics, or a related field.
Experience or familiarity with compilers, program transformation systems, or related infrastructure.
Understanding of deep learning frameworks such as PyTorch, TensorFlow, and ONNX - and their model representations.
Ability to abstract complex system constraints into consistent, user-friendly programming interfaces.
Proficiency in Python and experience with at least one systems programming language such as Rust or C++.
Preferred Qualifications
Master's or PhD in Programming Languages, Compilers, Program Analysis, or related fields.
Experience designing and implementing domain-specific languages (DSLs) or user-facing programming models.
Deep understanding of PyTorch compiler internals (TorchDynamo, FX Graph, torch.compile, torch.export) or kernel programming languages such as Triton.
Research or industry experience with compiler frameworks such as LLVM, MLIR, or TVM.
Understanding of AI accelerator architectures (NPU, GPU, TPU) and their implications for programming model design.
Experience with graph-level compilation optimizations or contributions to open-source compiler and deep learning framework projects.
Why Join FuriosaAI
The defining bottleneck of the AI era is building the right hardware and software stack to run it at global scale. Furiosa is solving this challenge holistically from the ground up.
With our flagship chip, RNGD, in mass production today and our next-generation platform in development with Broadcom, we are proving that full-stack, tensor-native compute is the future of AI infrastructure. This is a pivotal moment to join our team, right as we accelerate our global expansion.
At Furiosa, you will:
Solve AI’s Most Urgent Challenge. Help build the high-performance, energy-efficient inference hardware and software required to fulfill the promise of advanced AI.
Pioneer Full-Stack Co-Design. Work with teams that are architecting solutions from silicon up through the compiler (featuring innovations like Tensor Contraction Language and Virtual ISA) and serving frameworks.
Ship Real-World Silicon, Software, and Solutions. Turn breakthrough technology into commercial deployment. RNGD is in mass production with TSMC and running live enterprise workloads for global leaders like LG AI Research and Samsung SDS.
Partner With the Industry's Best. Collaborate across an elite global ecosystem that includes TSMC, Broadcom, SK Hynix, and GUC.
Do Your Life’s Best Work. Join a brilliant, low-ego, mission-driven team in a high-trust environment that values autonomy, intellectual curiosity, and shared ambition.