Edge-AI Verification Lead, Google Cloud

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.

You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.

Responsibilities

• Lead the verification of an edge AI IP, to be used in Google edge-AI products.
• Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
• Plan the verification of digital design blocks, including writing test plans, and other verification documents.
• Code development of verification features and capabilities, and participate in RTL debug.
• Work closely with Architecture, Software, Design, and Physical Design stakeholders to make technical decisions and represent project status throughout the development process.

Qualifications

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, a related technical field, or equivalent practical experience.
• 10 years of experience working with hardware verification languages (e.g., SystemVerilog/Specman), design verification methodologies (e.g., UVM) and chip design flow.
• Experience in leading chip verification teams through the full lifecycle from concept to delivery.
• Experience in creating chip or subsystem design verification strategies and plans.

Preferred qualifications:

• 15 years of experience in verification of complex SoC/ASIC.
• 8 years of experience managing verification teams.
• Experience in verification of complex ISP (Image Signal Processing) designs.
• Experience in chip design/verification of AI/ML logic.
• Experience in Low Power Verification.
• Experience with industry verification techniques, including complementary techniques such as Formal Verification, and Emulation.