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Salary
≈ $86k – $179k per year (Estimated)
Location
In office (Fremont)
Seniority
Middle · 3+ years exp

Confirmed on the employer's own hiring board on Sep 26, 2026. First seen by Alion on Aug 27, 2026.

Overview
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Impact
Profile match
Google is an American technology company founded in 1998 by Larry Page and Sergey Brin and now the principal subsidiary of Alphabet, headquartered in Mountain View, California. It operates the world's dominant search engine and the advertising system built around it, along with YouTube, Android, Chrome, Gmail, Maps, Workspace and Google Cloud, reaching billions of users across nearly every internet-connected market. The company designs its own silicon in the Tensor Processing Unit line, develops the Gemini foundation models through Google DeepMind, and derives most of its revenue from advertising while cloud has become its fastest growing segment.

About the job

As a Reliability Engineering Technician, you will be responsible for running the operation in Raxium Reliability Lab as a skilled operator and also a technical troubleshooter. You will operate our Reliability stress chambers; execute reliability stress tests, and perform initial troubleshooting for any failure. You will work closely with engineering teams to support reliability stress operations, ensure equipment uptime, and collaborate with test teams for product testing.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $99000 - $140000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities

  • Support reliability stress testing within the lab, manage Manufacturing Execution System (MES) transactions, and synchronize Work-in-Progress (WIP) tracking, effectively bridging operator and technician responsibilities.
  • Drive initial debug activities of product failures in the reliability lab, coordinate with FA, test, and reliability engineers to submit and track formal FA job requests.
  • Own new stress code validation, execute first pass reliability data analysis, create automation and reporting for data analysis, chamber profiles, lab environmental parameter tracking.
  • Lead the setup of new stress chambers and stations installations, supporting electrical rack installation, software configuration, and precision mechanical/optical assembly
  • Drive process consistency by creating detailed work instructions (SOPs), conducting equipment audits/qualifications, maintaining stress chamber documentations.

Qualifications

Minimum qualifications:

  • Associate's degree in Electrical Engineering, Electronics, Mechanical Engineering, or equivalent practical experience.
  • 2 years of experience working in a semiconductor lab or manufacturing environment.
  • 1 year of experience troubleshooting electromechanical systems for reliability stress station, chambers, or automated test equipment.
  • Experience performing precision soldering and mechanical assembly.

Preferred qualifications:

  • Bachelor's degree in Electrical Engineering, Electronics, Mechanical Engineering, or equivalent degree.
  • 3 years of experience working in a semiconductor lab or manufacturing environment.
  • Experience in operating and troubleshooting reliability stress chambers.
  • Demonstrated experience writing technical documentation or maintenance checklists.
  • Familiarity with Linux/Unix command line environments, proficiency in Google Workspace (Docs, Sheets, Slides), with a basic familiarity with Python.
  • Manual dexterity and attention to detail for handling sensitive semiconductor components.
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