887,129open jobs
55,275companies
147,816added this week
Browse all
Salary
≈ $36k – $82k per year (Estimated)
Location
In office (New Taipei)
Seniority
Staff · 8+ years exp

Confirmed on the employer's own hiring board on Sep 26, 2026. First seen by Alion on Sep 7, 2026. Google scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Google is an American technology company founded in 1998 by Larry Page and Sergey Brin and now the principal subsidiary of Alphabet, headquartered in Mountain View, California. It operates the world's dominant search engine and the advertising system built around it, along with YouTube, Android, Chrome, Gmail, Maps, Workspace and Google Cloud, reaching billions of users across nearly every internet-connected market. The company designs its own silicon in the Tensor Processing Unit line, develops the Gemini foundation models through Google DeepMind, and derives most of its revenue from advertising while cloud has become its fastest growing segment.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will develop and deploy productization solutions while partnering with cross-functional teams to enable manufacturing at fabrication plants and assembly and test sites. You will help integrate System on a chip (SoC) technologies into devices and facilitate Automated Test Equipment (ATE)/System Level Testing (SLT) manufacturing testing of SoC to validate performance and screen out failing devices. You will work with cross-functional teams to ensure optimal test coverage and cost efficiencies in production to ensure quality SoCs. You will work with multiple groups to develop digital and mixed signal tests, automation methodologies, develop/support internal tools for data analysis, yield analysis, silicon debug, reliability qualification, manufacturing ramp and customer returns. You will also be a partner on releasing production test solutions into mass production.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Perform SoC Artificial Intelligence (AI)-centric product specifications and Design for testing (DFT) architecture reviews and generate New Product Introduction (NPI) characterization, test, or manufacturing plans.
  • Support test hardware design (e.g., probe card, Load board) requirements, ATE/SLT test program review, and work for test coverage.
  • Perform Die/Package level bring-ups, troubleshoot different failure modes and help resolve issues by collaborating with cross-functional teams.
  • Support Outsourced Assembly and Test (OSAT) bring-up, ATE/SLT manufacturing test programs releases, and meet test cost goals.
  • Manage NPI and Manufacturing Return Materials/Merchandise Authorizations (RMAs) to achieve Turn Around Times (TATs) and provide lot dispositions.

Qualifications

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Semiconductor Processing, or a related field, or equivalent practical experience.
  • 4 years of experience in VLSI technologies, product and test engineering, and semiconductor processing.
  • Experience in Integrated Circuit (IC) qualification, data review, production release, system level testing, test time reduction and yield improvement.
  • Experience with Yield and Fail Pareto Analysis using JMP, Exensio, Datapower or O+.

Preferred qualifications:

  • 8 years of experience in VLSI technologies, Product and Test Engineering, Semiconductor processing.
  • Experience in Test and Design for test (DFT) techniques, and with structural tests such as Scan/ATPG, JTAG, Memory BIST and sensors such as PVT/temperature/current/droop sensors, etc.
  • Experience with test chip design, development and testing methodologies.
  • Experience with advanced packaging such as 2.5d, 3d, InFo.
  • Familiar with Automatic Test Equipment (ATE) test platforms such as Advantest 93K , Teradyne UltraFlex SOC test system.
  • Knowledge of reliability stress, device qualification and associated processes.
Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
887,129 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Recommended for you based on this role

Hardware
Similar stack
Same company
New Taipei
≈ $43k – $90k per year (Estimated) • In office • Full-Time • Bachelor's Degree • New Taipei
Chips/EDA
Altium Designer
Ansys HFSS
LTspice
Cadence Allegro
OrCAD
Mentor PADS
Keysight ADS
Ansys SIwave
Design
SolidWorks
AutoCAD
Apply
≈ $37k – $85k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • Zhubei
Design
SolidWorks
Apply
≈ $45k – $95k per year (Estimated) • In office • Hsinchu
Apply
≈ $49k – $103k per year (Estimated) • In office • Full-Time • 10+ years exp • Bachelor's Degree • Taipei
Verilog
SystemVerilog
VHDL
Apply
≈ $30k – $69k per year (Estimated) • In office • Full-Time • 3+ years exp • Bachelor's Degree • Taipei
C
C++
C
U-Boot
DevOps
CI/CD
Git
GitLab
Linux
Apply
≈ $121k – $240k per year (Estimated) • In office • 4+ years exp • Bachelor's Degree • Mountain View
SystemVerilog
Chips/EDA
UVM
Formal Verification
Apply
≈ $44k – $102k per year (Estimated) • In office • 2+ years exp • Bachelor's Degree • Warsaw
Python
C++
DevOps
Linux
Apply
≈ $182k – $339k per year (Estimated) • In office • 10+ years exp • Bachelor's Degree • Mountain View
AI/ML
AI Agents
Apply
≈ $168k – $307k per year (Estimated) • In office • 8+ years exp • Bachelor's Degree • Sunnyvale
C++
AI/ML
Vertex AI
TPU
Edge AI
DevOps
GCP
Apply
≈ $132k – $276k per year (Estimated) • In office • Bachelor's Degree • Tel Aviv
AI/ML
Vertex AI
TPU
DevOps
GCP
Apply
≈ $27k – $78k per year (Estimated) • In office • New Taipei
DevOps
Wi-Fi
Chips/EDA
Cadence Allegro
OrCAD
Mentor PADS
Apply
≈ $27k – $78k per year (Estimated) • In office • New Taipei
Apply
≈ $27k – $78k per year (Estimated) • In office • New Taipei
DevOps
Wi-Fi
Chips/EDA
Cadence Allegro
OrCAD
Mentor PADS
Apply
≈ $27k – $78k per year (Estimated) • In office • New Taipei
Apply
In office • 2+ years exp • New Taipei
Python
DevOps
Linux
Management
Power Automate
Apply
See all jobs
This is one of many
887,129 more open roles from verified company boards, updated every day.