Senior Design Lead

HCLTech • IT Consulting & Digital Transformation • IT Outsourcing & Dedicated Teams • Verilog • 2 days ago
Smart Apply
Similar jobs
1,827,859open jobs
106,613companies
259,143added this week
Browse all
Salary
≈ $21k – $49k per year (Estimated)
Location
In office (Hanoi)
Seniority
Staff · 2+ years exp

Confirmed on the employer's own hiring board on Oct 20, 2026. First seen by Alion on Oct 18, 2026.

Overview
Company
Impact
Profile match

HCLTech

HCLTech is a major Indian multinational information technology (IT) services and consulting company headquartered in Noida, Uttar Pradesh. Spun off from the original HCL Group in 1991, it ranks as one of India's largest technology companies alongside firms like TCS, Infosys, and Wipro.
hcltech.com • HQ: Noida, India • Systems Integrators • IT Consulting & Digital Transformation • IT Outsourcing & Dedicated Teams • 5000+ employees • Est. 1976
Tech stack of HCLTech

Job Summary

  • B.Tech./M.Tech with 2 to 10 years of experience exclusively in DFT.
  • Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.
  • Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.
  • Spy Glass experience to resolve DFT DRC at RTL stage is a must.
  • Good to have functional & integration knowledge of TAP controllers and JTAG
  • Must be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.

Good at Communication. Compatible to work with India teams

Key Responsibilities

  • B.Tech./M.Tech with 2 to 10 years of experience exclusively in DFT.
  • Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.
  • Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.
  • Spy Glass experience to resolve DFT DRC at RTL stage is a must.
  • Good to have functional & integration knowledge of TAP controllers and JTAG
  • Must be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.

Good at Communication. Compatible to work with India teams

Skill Requirements

Other Requirements

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,827,859 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware
Similar stack
Same company
Hanoi
Senior Design Lead 1 day ago
≈ $23k – $52k per year (Estimated) • Hybrid • 8+ years exp • Vietnam
Verilog
Chips/EDA
Synopsys SpyGlass
Apply
Design Lead 1 day ago
≈ $23k – $52k per year (Estimated) • Hybrid • 4+ years exp • Vietnam
Verilog
Chips/EDA
Synopsys SpyGlass
Apply
≈ $17k – $38k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Ho Chi Minh City
Python
Verilog
SystemVerilog
Perl
Chips/EDA
Formal Verification
QA
Rest-Assured
Apply
≈ $20k – $45k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Ho Chi Minh City
Python
SystemVerilog
Perl
Chips/EDA
UVM
Formal Verification
QA
Rest-Assured
Apply
≈ $20k – $46k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Ho Chi Minh City
Python
Verilog
SystemVerilog
Perl
Chips/EDA
Formal Verification
QA
Rest-Assured
Apply
Hybrid • Full-Time • 10+ years exp • Bachelor's Degree • Hanoi
Python
Go
JavaScript
Java
SQL
Node JS
Java
Spring Boot
Databases
MongoDB
PostgreSQL
Redis
Cassandra
Apache Kafka
AI/ML
Time Series Forecasting
DevOps
Rest API
TCP/IP
DNS
Wi-Fi
IoT
MQTT
Apply
≈ $19k – $42k per year (Estimated) • In office • 3+ years exp • Bachelor's Degree • Hanoi
AI/ML
Machine Learning
Apply
In office • Full-Time • Hanoi
Apply
Apply
In office • Hanoi
DevOps
SLI/SLO/SLA
Apply
See all jobs
This is one of many
1,827,859 more open roles from verified company boards, updated every day.
Browse all jobs Get matched roles