Senior Designer - Design Validation

Job Summary

Define ASIC/SoC verification strategy

Full chip testplan development

Full chip TB Architecture definition

UVM based testbench development

C based TB development

SV functional coverage, Assertions coding

Test case development, coding, execution, bug analysis

Gate Level Simulation

Regressions, coverage analysis

EducationDegree:

Core Technical Skills

Key Responsibilities

Good understanding of ASIC/SoC life cycle

Experience writing ASIC/SoC testplans

"Experience in writing verification strategy document

"

"1.Experience in ASIC/SoC Testbench definition

2.Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and the Universal Verification Methodology (UVM)."

"1. Experience in developing TB components for SOC with C, SV

"

"1.Expertise & hands-on experience in OVM/UVM methodologies using SV

2.Experience to Write, execute, and debug constrained-random and directed test cases based on defined test plans."

"1. Experience in developing TB components, including functional coverage implementation and assertion coding

2. Experience Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics to identify untested gaps in the design logic.

3.Debug complex simulation failures using waveform viewer tools to isolate design bugs from testbench issues.

4. Experince in SOC C based tests coding & debugging"

"Experience in Gate level simulation & netlist debugging

"

"Exeprince in regression failure analayiss

Functioncal and Code Coverage closure"

" Bachelor's or Master's degree in Electronics & Communication Engineering (ECE),

Electrical Engineering (EE), VLSI Design, or a closely related field"

Skill Requirements

Languages: Proficiency in Verilog, SystemVerilog, and core concepts of UVM.

Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.

Other Requirements

EDA Tools: Familiarity with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Siemens QuestaSim, Cadence Xcelium/Verdi).

Protocols: Basic understanding of standard bus protocols like AMBA (AXI, AHB, APB) or peripheral protocols (SPI, I2C, PCIe).

Scripting: Basic comfort working in a Linux environment and using scripting languages like Python, Tcl, or Perl for automation.