Senior Group Technical Architect

Job Summary

Pod 2 - Coretech - Lead

Pod / Track Pod 2 - Coretech

Role Title Lead - Core Platform Software (Bootloader, Power Management & Kernel Core)

Experience 8 - 10 years

Primary Location Hyderabad, India (Transition phase); HCLTech Offshore Delivery Center thereafter

Work Model Physical co-location at Hyderabad mandatory during Transition (Month 1-3) for knowledge transfer and hardware/lab access; delivery shifts to HCLTech's Offshore Delivery Center (ODC) from Shadow (Month 4-6) onward.

Role Summary

Own core platform software sustenance - bootloader, power management, and core kernel services - the foundation layer that every other pod's software builds on.

Key Responsibilities

• Sustain core platform software: bootloader (ABL/QHEE), power management (RPM/RPMh), clock/regulator frameworks, and core kernel subsystems not owned by other pods.
• Own peripheral driver, memory driver and clock/regulator sustenance across the SoC infrastructure layer, including non-HLOS (bare-metal/RTOS) firmware.
• Sustain DSP and NPU firmware images alongside core BSP firmware.
• Debug SoC bring-up issues, power sequencing failures, and core driver regressions.
• Own core platform documentation and coordinate cross-pod dependencies, since most other pods build on the coretech layer.
• Validate the BSP core layer against every new chipset/firmware release.
• Support customer escalations that require core platform expertise.
• Manage kernel/firmware version uplifts and vendor SDK integration at the core-platform level, and mentor the pod's Senior Engineers.

Must-Have Skills

• 8-10 years core platform software engineering.
• C, ARM architecture fundamentals.
• Linux kernel core subsystems.
• Power management frameworks (RPM/RPMh, clock/regulator).
• Bootloader development.
• JTAG / hardware debugger tooling.
• Non-HLOS/RTOS firmware and SoC infrastructure experience - peripheral drivers, memory drivers, DSP/NPU firmware.

Good-to-Have Skills

• Hypervisor/virtualization exposure (Xen, Gunyah or equivalent).
• Upstream Linux kernel contribution history.
• Functional-safety or industrial temperature-range product experience.
• Bring-up experience across more than one SoC family/generation.
• Exposure to multiple firmware toolchains across DSP/NPU subsystems beyond the main applications processor.

Key Responsibilities

Pod 2 - Coretech - Lead

Pod / Track Pod 2 - Coretech

Role Title Lead - Core Platform Software (Bootloader, Power Management & Kernel Core)

Experience 8 - 10 years

Primary Location Hyderabad, India (Transition phase); HCLTech Offshore Delivery Center thereafter

Work Model Physical co-location at Hyderabad mandatory during Transition (Month 1-3) for knowledge transfer and hardware/lab access; delivery shifts to HCLTech's Offshore Delivery Center (ODC) from Shadow (Month 4-6) onward.

Role Summary

Own core platform software sustenance - bootloader, power management, and core kernel services - the foundation layer that every other pod's software builds on.

Key Responsibilities

• Sustain core platform software: bootloader (ABL/QHEE), power management (RPM/RPMh), clock/regulator frameworks, and core kernel subsystems not owned by other pods.
• Own peripheral driver, memory driver and clock/regulator sustenance across the SoC infrastructure layer, including non-HLOS (bare-metal/RTOS) firmware.
• Sustain DSP and NPU firmware images alongside core BSP firmware.
• Debug SoC bring-up issues, power sequencing failures, and core driver regressions.
• Own core platform documentation and coordinate cross-pod dependencies, since most other pods build on the coretech layer.
• Validate the BSP core layer against every new chipset/firmware release.
• Support customer escalations that require core platform expertise.
• Manage kernel/firmware version uplifts and vendor SDK integration at the core-platform level, and mentor the pod's Senior Engineers.

Must-Have Skills

• 8-10 years core platform software engineering.
• C, ARM architecture fundamentals.
• Linux kernel core subsystems.
• Power management frameworks (RPM/RPMh, clock/regulator).
• Bootloader development.
• JTAG / hardware debugger tooling.
• Non-HLOS/RTOS firmware and SoC infrastructure experience - peripheral drivers, memory drivers, DSP/NPU firmware.

Good-to-Have Skills

• Hypervisor/virtualization exposure (Xen, Gunyah or equivalent).
• Upstream Linux kernel contribution history.
• Functional-safety or industrial temperature-range product experience.
• Bring-up experience across more than one SoC family/generation.
• Exposure to multiple firmware toolchains across DSP/NPU subsystems beyond the main applications processor.

Skill Requirements

Other Requirements