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Salary
≈ $73k – $144k per year (Estimated)
Location
In office (Singapore)
Seniority
Staff · 3+ years exp

Confirmed on the employer's own hiring board on Nov 1, 2026. First seen by Alion on Aug 6, 2026. Infineon Technologies scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Infineon Technologies is a semiconductor company near Munich that was spun out of Siemens in 1999. It is the world leader in power semiconductors and a major supplier of automotive chips, security controllers and sensors. The company operates fabrication plants in Germany, Austria and Malaysia and is building a large new site in Dresden.

#WeAreIn for jobs

that impact everyone's life.

Build the future

nobody’s dreamed of yet... are you ready to rethink the impossible?

As a Digital Design Engineer n our

Research & Development team, you'll have the opportunity to merge

creativity with your technical expertise by shaping the future of technology,

driving groundbreaking projects, and bringing new ideas to life.

Are you in?

Your role

Key responsibilities in your new role

  • Perform RTL-to-gate synthesis using EDA tools such as Synopsys Design Compiler/Fusion Compiler or Cadence Genus to generate optimized gate-level netlists.
  • Run Static Timing Analysis (STA) including setup/hold checks across pre- and post-layout stages using tools such as Synopsys PrimeTime or Cadence Tempus.
  • Collaborate with design, verification, and PD teams to ensure timing closure and design optimization.
  • Assist in the development and maintenance of synthesis and STA scripts and methodologies.
  • Analyze and resolve timing issues, working closely with cross-functional teams.
  • Run timing constraint checks and logic equivalency checks (LEC).
  • Participate in design reviews and provide feedback on timing and synthesis aspects.
  • Document and report synthesis and STA results, highlighting key findings and recommendations.

Your profile

Qualifications and skills to help you succeed

  • Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • At least 3-5+ years of hardware engineering (or related) experience.
  • Hands-on experience with logic synthesis, LEC, STA, timing constraints, and timing convergence.
  • Expertise in timing closure via ECOs, including crosstalk and noise analysis.
  • Background in physical design and optimization (e.g., placement, routing, cell sizing) to improve timing and power.
  • Ability to run basic PD steps such as floorplanning and placement using ICC2 or Innovus (plus).
  • Proficiency in scripting (Python, Tcl, Perl) for automation.
  • Excellent verbal and written communication skills.

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

Are you in?

We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.

Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

Sherlene Ong

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