Senior Staff Engineer Software

Your Role

Key responsibilities in your new role

• Act as hands-on technical lead for virtual prototype and system modelling, covering architecture, implementation strategy, design reviews, and best practices using SystemC, TLM 2.0, CCI, UVM, Synopsys Virtualizer, ASTC VLAB, and related ESL tools.
• Lead requirements analysis and define scalable SystemC model architectures aligned with product, verification, and software enablement goals.
• Own SystemC model implementation and unit verification, ensuring quality, maintainability, reuse, and milestone alignment.
• Lead virtual prototype integration, system testing, and complex debug with drivers, startup software, and RTL SoC verification environments.
• Support quality governance, audit readiness, technical sign-off, issue closure, and release readiness.
• Drive root-cause analysis and cross-functional debug for internal and external stakeholder use cases.
• Identify and mitigate risks across architecture, implementation, verification, integration, and delivery.
• Improve design and test methodologies, automation, reuse, quality practices, and responsible GenAI-assisted workflows for virtual prototype development.
• Collaborate with RTL IP, subsystem, and SoC teams to enable early testbench development, verification readiness, and cross-domain alignment..
• Build team competence through mentoring, knowledge sharing, hiring support, training, and continuous capability development.

Your Profile

Qualifications and skills to help you succeed

• B.Tech, B.E., M.Tech, or M.S. in Electrical Engineering, Electronics, Computer Science, Instrumentation, or a related discipline.
• 5+ years of relevant experience, including hands-on contribution and technical leadership in virtual prototype development, system modelling, verification, integration, or embedded software enablement.
• Expert in System-C/ TLM 2.0 on various development platform (Windows/Linux etc.)
• Development of functional/cycle approximate models using SystemC and tools such as Synopsys Virtualizer ASTC VLAB etc. based on Visual Studio, g++ (for Linux)
• Verification of models using various methods, such as standalone SystemC based unit verification, co-simulation with RTL (System Verilog) and SW based system testing etc.
• Good grasp over the techniques and technologies to identify issues in customer environments using traces, logs etc.
• Exposure to the scripting languages such as python.
• Expert knowledge of computer architecture, embedded CPU (ARM/RISC-V), real-time systems, Automotive communication platforms (Ethernet, CAN, FlexRay etc.)
• Embedded system test development using C/C++ and automated execution/debugging.
• Hands-on experience on embedded compilers such as GNU, Tasking etc. and debuggers such as PLS, Lauterbach T32 etc.
• Good team player in a multi-site/multi-cultural work environment
• Demonstrated strength of strong Communication skills, Innovation mindset, stakeholder management, risk management, quality, and process compliance, mentoring and coaching of peers etc.
• Exposure to GenAI-assisted workflows for virtual prototype development using tools such as GitHub Copilot, Microsoft Copilot, ChatGPT, or enterprise LLM assistants for code scaffolding, test ideation, documentation, debug support, and validation of generated outputs.

Contact:

[email protected], LinkedIn

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