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Location
Hybrid (Haifa, Israel)
Seniority
Senior · 5+ years exp
Employment
Full-Time

First seen by Alion on Jul 29, 2026. Intel scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Intel is an American semiconductor company founded in 1968 by Robert Noyce and Gordon Moore and headquartered in Santa Clara, California. It created the x86 instruction set that still underpins most personal computers and servers, and designs and manufactures processors, chipsets, discrete graphics, networking silicon and AI accelerators. Unlike most of its competitors the company owns its fabrication plants, and it is investing heavily in Intel Foundry to manufacture chips for external customers while rebuilding its process technology leadership.

Job Details:

Job Description:

About the team:

Network and Collectives owns the scale-out communication substrate for our AI accelerator - the NCCL equivalent for our hardware. We turn many chips into one machine: all-reduce, all-gather, reduce-scatter and point-to-point, made topology-aware and mapped onto the rack/pod interconnect.

We are measured on real fabric across a pod, not on a single card, and we pair tightly with the Tray/Rack/Pod/Cluster HW pillar and the Multi-Node Runtime team.

What you will do:

  • Design and implement collective algorithms tuned to our interconnect topology and bandwidth/latency profile.
  • Build a topology-aware transport layer over the tray/rack/pod.
  • Optimize end-to-end collective performance across multi-node pods; profile, find bottlenecks, and close the gap to fabric peak.
  • Co-design with HW on interconnect features, and with Multi-Node Runtime on partitioning, overlap, and scheduling.
  • Own correctness and numerical determinism of reductions across scale-out.

Qualifications:

  • 5+ years AI/Systems/HPC software in C++; strong concurrency and lock-free design.
  • Hands-on with collective libraries (NCCL/MPI/etc) or scale-out communication.
  • Working knowledge of the communication patterns behind tensor, pipeline, and expert parallelism, and how they map onto collectives and the underlying fabric.
  • Performance engineering: profiling, bandwidth/latency tuning, roofline reasoning.

Nice-to-have

  • Topology/placement algorithms; congestion control; multi-tenant fabrics.
  • Large-scale distributed training/inference exposure.
  • Experience with large-scale inference serving stacks (vLLM, SGLang, TensorRT-LLM, DeepSeek).
  • RDMA/InfiniBand/RoCE, GPUDirect-style transfers, or comparable fabric experience.

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Haifa

Additional Locations:

Israel, Petah-Tikva

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

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