SoC Functional Validation Engineer - Memory

Job Details:

Job Description:

The Role and Impact

As a SoC Functional Validation Engineer, you will play a key role in ensuring the quality and reliability of Intel’s next-generation platforms, including CPUs, chipsets, and boards. You will focus on post-silicon validation debug, performing hands-on and characterization activities to identify issues, root-cause failures, and enabling hardware functionality across firmware and software interactions. A major focus of this role is memory feature enablement, DDR / LPDDR technology bring-up, and advanced memory subsystem debug during new-generation CPU/SoC power-on, covering memory initialization, training optimization, frequency scaling, stability assessment, and power-management validation. Your contributions will directly impact Intel's ability to deliver high-quality products across server, desktop, and mobile market segments.

Business Group

The Functional Validation team belongs to Intel Corporation and is chartered to perform post-silicon validation of cutting-edge Client AI PC SoCs and platforms. This team is dedicated to ensuring the functionality of SoC hardware features in real-world environments while supporting Intel’s broader goals of innovation and product excellence. With a strong focus on quality and reliability, the team is instrumental in driving Intel’s success in delivering reliable solutions to its global customers.

Key Responsibilities

- Perform post-silicon validation and debug to ensure platform functionality aligns with design and architecture specifications.

- Develop and enhance debug methodologies, debug flow, and AI debug frameworks to improve debug efficiency, quality, and productivity.

- Conduct hands-on debug of hardware, firmware, and software interaction issues, identifying and resolving failures across CPUs, chipsets, boards, and memory subsystems.

- Drive Memory feature enablement and debug during new-generation CPU/SoC power-on activities, including DDR5 and LPDDR5/LPDDR5X bring-up, MRC/BIOS analysis, memory initialization, training convergence, frequency scaling, and stability assessment.

- Investigate and debug memory training algorithms, including read leveling, write leveling, read/write training, command/address training, power training, timing optimization, voltage margining, and signal integrity-related issues.

- Analyze memory reference code, BIOS logs, training reports, margin data, eye diagrams, and memory matrix results to identify root causes and improve platform robustness.

- Perform DDR memory characterization, margin validation, RMT analysis, failure pattern investigation, and memory subsystem tuning across different configurations and operating conditions.

- Collaborate with architecture, design, firmware, BIOS, and silicon teams to resolve complex memory-related issues and improve validation effectiveness.

- Debug tool capabilities including traces, cross-triggers, VISA, scan, and silicon observability features in pre-silicon and post-silicon environments.

- Drive continuous improvement in validation and debug strategies, debug methodologies, and memory validation coverage.

- Utilize hardware lab equipment such as logic analyzers, oscilloscopes, protocol analyzers, and memory debug tools to reproduce issues, collect data, and accelerate root-cause analysis.

Qualifications:

Minimum Qualifications

- Bachelor’s degree in a relevant field with 2 years of experience in SoC validation, design, or debugging, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training OR a Master’s degree in a relevant field with no prior professional experience.

- Fundamental knowledge of SoC platform architectures, PC architecture, and hardware setup.

- Proficiency in scripting or programming for debugging purposes.

- Experience with system-level validation methodologies, including hardware and firmware integration testing.

Preferred Qualifications

- Familiarity with validation tools such as Lauterbach debuggers, memory logic analyzers, oscilloscope and protocol exercisers.

- Experience in post silicon and hardware debug for SoC validation.

- Passion for problem-solving and continuous improvement, with a drive to explore new technical strategies or methodologies.

- Strong communication and collaboration skills, with the ability to present technical findings and influence stakeholders effectively.

Join us and be part of a team that is shaping the future of technology. Your contributions will directly impact the quality and reliability of Intel products, empowering innovation across global markets.

Job Type:

College Grad

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.