Power Integrity Engineer

Job Details:

Job Description:

As a Power Integrity Engineer, you will play a pivotal role in ensuring Intel's platforms and products meet the highest standards of performance and reliability. This position offers you the opportunity to work on cutting-edge technologies, designing and optimizing power delivery networks for complex high-speed platforms, boards, packages, and silicon. Your contributions will directly impact Intel's ability to deliver industry-leading solutions to its customers, driving innovation in power integrity and enhancing the performance and functionality of our silicon and systems. Join us to tackle exciting challenges and create impactful solutions that push technological boundaries.

The primary responsibilities for this role will include, but are not limited to:

• Develop and analyze power delivery networks, including 2D and 3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards.
• Define power grid specifications and power and area targets to achieve optimal balance between power integrity and performance.
• Design test structures, electrical analysis methodologies, and verification plans to address power integrity challenges. - Perform measurements to characterize power noise profiles across frequency, ground bounce, and other critical metrics, verifying power delivery networks post-design.
• Correlate measurements back to presilicon analysis and estimations for improved accuracy.
• Apply expertise in power integrity design and tradeoffs to guide simulations of power networks and physical implementations for packages and platforms.
• Ensure on-die power noise meets system-on-chip (SoC) functionality and performance requirements.
• Collaborate with silicon integration, die floor planning, and package design teams to optimize on-die decoupling partitions and implement package decoupling schemes.
• Develop and deliver platform-level power shapes and decoupling solutions as part of platform design guides for customers.
• Derive platform-level specifications from silicon specifications and drive convergence on feature sets, form factors, and voltage regulator performance

Qualifications:

Minimum Qualifications:

Minimum qualifications are required to be initially considered for this position.

• Candidate must possess a bachelor's degree or higher in Electrical or Electronic Engineering.
• Minimum of 5 years of experience on Technical Knowledge as electrical design engineer: Silicon, package or board level design.
• Expertise in electrical characterization tools and methodologies.
• Knowledge of power integrity design, power delivery networks, and hardware architecture fundamentals.
• Expertise to perform power and performance analysis and optimization.
• Familiarity with package fundamentals and voltage regulation principles.
• Advanced English communication skills (written and oral).
• Must have unrestricted - permanent right to work in Costa Rica.

Preferred Qualifications:

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Strong collaboration and communication skills, with a proven ability to work across teams to solve complex technical challenges.
• Experience in disciplined execution to deliver results under tight schedules and competing priorities.
• Electrical simulation software knowledge such as Sigrity PowerSI, PowerDC, HSpice, Matlab, HFSS
• Proven ability to align technical solutions with broader business goals and customer needs.

Take the next step in your career and apply today to join Intel's talented team of engineers, shaping the future of power integrity solutions and driving innovation across the industry.

Job Type:

Experienced Hire

Shift:

Shift 1 (Costa Rica)

Primary Location:

Costa Rica, San Jose

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.