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Salary
≈ $69k – $120k per year (Estimated)
Location
Remote (United States, Canada)
Seniority
Senior · 5+ years exp
Employment
Contractor

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Oct 23, 2026. Kepler Communications scores A on the Alion truth index.

Overview
Company
Impact
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Kepler Communications is a satellite telecommunications and space infrastructure company dedicated to building the "Internet for space". Headquartered in Toronto, Canada, the company designs, manufactures, and operates an advanced low Earth orbit (LEO) satellite constellation equipped with optical inter-satellite links (OISLs). Founded in 2015, Kepler operates as a vertically integrated provider of real-time optical data relay and on-orbit compute capabilities, enabling commercial, government, and scientific satellite operators to transmit high-volume data continuously and securely without waiting for direct ground-station passes.

We’re on the hunt for a top-tier FPGA Digital Design Engineer for a 6+ month contract to develop the next generation of our satellites.

At Kepler, you’ll have the opportunity to work with a dedicated team of engineers building the Kepler spacecraft. You will be responsible for the design and implementation of FPGA code either with a focus on DSP algorithms to modulate and demodulate signals on board our software defined radio (SDR), or embedded systems interfacing with processors and peripherals. To be effective you will need to participate in all phases of FPGA design flow (Simulation, Synthesis, Place & Route, Timing Closure and Hardware Testing). A good understanding of the intricacies of FPGA development would make a candidate standout.

Key Responsibilities:

  • Develop custom IP for new features of the Kepler satellite digital payloads
  • Iterate on current DSP and interface designs to improve reliability
  • Work with IP core vendors to integrate new functionality into the Kepler designs
  • Work with lead engineers in developing the communications and network architecture of our future satellite constellation
  • Participate in conceptual design studies of new spacecraft

Required Skills & Qualifications:

  • Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent
  • 5+ yr. working experience with FPGA/RTL design
  • Verilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilog
  • Xilinx FPGA(s). Specifically, Zynq and UltraScale
  • Solid understanding of timing principles, including clock domain crossing and timing closure
  • Strong scripting skills (e.g Python, Tcl, csh/bash, etc.)
  • Experience with FPGA tools (e.g Vivado, Quartus), HDL Simulation Tools (ModelSim)

Bonus Points:

  • Masters of Science in Computer/Electrical Engineering, or equivalent
  • Experience in coherent digital demodulation of waveforms such as BPSK, QPSK, QAM
  • Experience with memory mapped interfaces such as AXI, Wishbone, Avalon
  • Experience with high-speed transceivers for protocols such as JESD204B, PCIe, SATA
  • Experience with Linting tools, Questa Simor Riviera-Pro
  • Experience with Xilinx Versal and RFSoC
  • Experience designing printed circuit boards
  • Knowledge of radio-frequency electronics design
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