1,828,051open jobs
105,263companies
275,758added this week
Browse all
Salary
$109k – $202k per year
Location
In office (Rochester)
Seniority
Staff · 8+ years exp
Visa
H-1B filings in 12 months: 5

Confirmed on the employer's own hiring board on Oct 18, 2026. First seen by Alion on Oct 1, 2026. L3Harris Technologies scores A on the Alion truth index.

Overview
Company
Impact
Profile match
L3Harris Technologies is an American defense contractor formed in 2019 by the merger of L3 Technologies and Harris Corporation. It builds tactical radios and military communication systems, electronic warfare and intelligence, surveillance and reconnaissance equipment, space sensors and satellites, night vision devices, and uncrewed surface vessels, and owns the rocket engine maker Aerojet Rocketdyne. Its main customers are the United States Department of Defense and allied governments. The company is headquartered in Melbourne, Florida, United States.

Job Title: Manager , Electrical Engineering (FPGA)

Job Code: 43897

Job Location: Rochester, NY

Job Schedule: 9/80 - Employees work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off OR 5/8: Employees work 8 hours per day, 5 days a week

Job Description:

L3harris is seeking an Electrical Engineering Manager with an FPGA/Digital Design background to support our development of secure tactical communication products. The Candidate will manage and lead a team of embedded FPGA engineers developing FPGA firmware for wireless communication system applications and products. Candidate must have 8+years experience in FPGA/Firmware development, as well as experience in technical team and project leadership. Candidate will be responsible for managing resources, schedule, and budget for firmware development projects. Candidate will work with cross functional teams to define, design, and verify FPGA solutions for radio product development projects. Candidate will be responsible for all supervisorial tasks and career development of direct reports.

Essential Functions:

  • Management responsibilities for a team of FPGA engineers, including setting goals, timecard responsibilities, development plans, and training.
  • Responsible for driving teams work to delivery completion and metrics of the team.
  • Maintain and drive improvement of FPGA Development processes
  • Create FPGA development cost estimates and schedules
  • Manage budget and schedule of assigned development projects
  • Ability to Obtain a US Security Clearance.

Qualifications:

  • BS degree in Electrical or Computer Engineering discipline or another STEM Bachelor's Degreewith a minimum of 8 years of relevant experience developing and verifying FPGA/ASIC based embedded system solutions.
  • Demonstrated project leadership and management skills in embedded system and FPGA/ASIC design
  • Working knowledge of FPGA/ASIC development and verification processes.

Preferred Additional Skills:

  • Experience in VHDL/Verlilog coding for synthesis
  • Experience in FPGA/ASIC verification using SystemVerilog
  • Experience in UVM/OVM FPGA/ASIC verification methodology
  • Experience in development of embedded cryptographic security solutions for communciation products
  • Experience in development of signal processing solutions for communciation products
  • Highly motivated, self-starter, who works well in team environments and is willing to lead and mentor others.
  • Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.
  • Ability to work efficiently with remotely located teams and co-workers
  • Active SECRET Clearance

In compliance with pay transparency requirements, the salary range for this role in New York state is $108,500 - $201,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,828,051 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware
Similar stack
Same company
Rochester
$120k – $235k per year • In office • 6+ years exp • Bachelor's Degree • Redmond
Python
Ruby
C++
Perl
MATLAB
DevOps
Azure
Apply
SMTS Logic Design 1 hour ago
$127k – $288k per year • Equity • Hybrid • 10+ years exp • Hillsboro
Python
Verilog
SystemVerilog
Perl
TCL Scripting
Chips/EDA
UVM
Apply
≈ $153k – $278k per year (Estimated) • In office • San Jose
Python
AI/ML
BERT
Apply
RF Test Engineer 3 hours ago
≈ $115k – $211k per year (Estimated) • In office • 5+ years exp • Bachelor's Degree • San Diego
Apply
$110k – $140k per year • Hybrid • Full-Time • 3+ years exp • Bachelor's Degree • Cambridge
Python
AI/ML
Copilot
Cursor
Claude
ChatGPT
Claude Code
AI Agents
LLM
Apply
$150k – $230k per year • In office • 8+ years exp • Bachelor's Degree • San Jose
Python
SystemVerilog
Chips/EDA
UVM
Formal Verification
Apply
$170k – $250k per year • In office • 8+ years exp • Bachelor's Degree • San Francisco
Python
SystemVerilog
Chips/EDA
UVM
Formal Verification
Apply
≈ $66k – $140k per year (Estimated) • In office • Singapore
Python
Verilog
C++
SystemVerilog
Perl
AI/ML
NVLink
Chips/EDA
UVM
Apply
≈ $61k – $130k per year (Estimated) • In office • Singapore
Python
Verilog
C++
SystemVerilog
Perl
AI/ML
NVLink
Chips/EDA
UVM
Apply
≈ $101k – $209k per year (Estimated) • In office • 10+ years exp • Bachelor's Degree • Seongnam
Python
Verilog
SystemVerilog
AI/ML
Model Context Protocol
Embeddings
AI Agents
LLM
RAG
Edge AI
Machine Learning
Chips/EDA
UVM
Formal Verification
Apply
≈ $99k – $181k per year (Estimated) • In office • Secret • 8+ years exp • Cincinnati
VHDL
MATLAB
Management
Microsoft Office
Apply
$107k – $198k per year • In office • 10+ years exp • Bachelor's Degree • Canoga Park
MATLAB
MATLAB
Simulink
Apply
$107k – $198k per year • In office • TS/SCI • 10+ years exp • Carlsbad
C
C
Embedded C
Chips/EDA
OrCAD
Mentor Xpedition
Mentor PADS
Apply
$135k – $251k per year • In office • 13+ years exp • Master's Degree • Salt Lake City
Verilog
C#
C++
VHDL
MATLAB
MATLAB
Simulink
AI/ML
Machine Learning
DevOps
Git
Chips/EDA
Siemens ModelSim
Xilinx Vivado
Synplify Pro
Apply
$127k – $236k per year • In office • Secret • 13+ years exp • Bachelor's Degree • Yorba Linda
MATLAB
MATLAB
Simulink
Chips/EDA
Ansys HFSS
Apply
In office • Rochester
Management
Outlook
Microsoft Office
Marketing
Salesforce
LinkedIn
Apply
$68k – $118k per year • Equity • In office • Full-Time • Bachelor's Degree • Rochester
Apply
$150k – $202k per year • Equity • In office • Full-Time • 5+ years exp • Bachelor's Degree • Rochester
AI/ML
Edge AI
Apply
$86k – $150k per year • Equity • In office • Full-Time • Bachelor's Degree • Rochester
Management
Microsoft Office
Apply
≈ $21k – $38k per year (Estimated) • In office • Part-Time • Rochester
Apply
See all jobs
This is one of many
1,828,051 more open roles from verified company boards, updated every day.