2,048,870open jobs
122,897companies
238,955added this week
Browse all
Salary
≈ $118k – $230k per year (Estimated)
Location
In office (San Jose)
Seniority
Staff · 8+ years exp
Visa
H-1B filings in 12 months: 6 · green card filings: 5

Confirmed on the employer's own hiring board on Nov 2, 2026. First seen by Alion on Oct 30, 2026. Lattice Semiconductor scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Lattice Semiconductor is a semiconductor company headquartered in Hillsboro, Oregon, designing low-power field programmable gate arrays (FPGAs), programmable logic devices and related software for compute, communications, industrial, automotive, consumer and aerospace markets. Founded in 1983 in Oregon's Silicon Forest and listed on Nasdaq, it describes itself as the largest supplier of small FPGAs by installed base, with design and operations centers in San Jose, Pune, Penang, Taipei, Manila and Shanghai. It hires IC and SoC design engineers, firmware and BMC engineers, silicon validation and foundry engineers, field applications engineers, product marketers and finance staff.

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Duties:

Responsible for RTL design and verification, leveraging deep expertise in Lattice Semiconductor products and customer applications across diverse market segments.

This role involves:

  • Developing complex systems from concept to board-level validation using Lattice proprietary FPGA architectures and tool flows.
  • Building embedded systems within Lattice FPGAs, including microprocessor design and embedded software development.
  • Integrating IPs into FPGA software flows and supporting end-to-end system implementation.
  • Analyzing hardware capabilities and contributing to customer solution strategies.
  • Architecting Soft IPs with detailed technical specifications and coordinating development efforts.
  • Collaborating cross-functionally with software and applications teams to communicate requirements, resolve issues, and drive enhancements.

Specific duties include:

  • Architect and develop DDR Memory Controller soft IPs
  • Optimize soft IPs to achieve better performance (latency, size, frequency)
  • FPGA design and implementation using software primitives
  • Integration with third-party hardened PHYs
  • Team leadership and stakeholder management
  • Static Timing Analysis (STA) and constraint writing
  • RISC-V based system design and evaluation
  • Customer support and issue resolution
  • Quality review of third-party deliverables
  • Test development to validate implementation and ensure high quality

Minimum Requirements:

  • Bachelor’s degree in Electronics Engineering, Applied Physics or related field
  • 8 years of experience as Design Engineer or related field

Prior experience to include:

  • FPGA and SoC ASIC development.
  • IP for FPGA and ASIC products
  • FPGA RTL design, logic verification, debug and timing closure
  • DDR protocols (e.g.: DDR3, DDR4, LPDDR4, DDR5)
  • High-speed interface subsystems
  • High-speed protocols (PCIe, Ethernet, and MIPI)
  • Peripheral IPs (UART, SPI, I2C, and I3C)
  • Hardware validation and hardware interoperability testing

Pay & Benefits

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

0.00

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
2,048,870 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Recommended for you based on this role

Industrial Engineering
Similar stack
Same company
San Jose
In office · TS/SCI · Full-Time · 7+ years exp · Bachelor's Degree · Palmdale
Cybersecurity
NIST 800-53
Threat Modeling
Apply
In office · 5+ years exp · Dededo
SpaceTech
FMEA
Apply
In office · TS/SCI · 10+ years exp · Annapolis Junction
Apply
$76k – $112k per year · In office · Full-Time · 5+ years exp · Associate's Degree · Union City
Apply
$77k – $112k per year · In office · Full-Time · 5+ years exp · Associate's Degree · Union City
Apply
$80k – $106k per year · In office · 5+ years exp · Bachelor's Degree · San Jose
Python
C#
C++
DevOps
Linux
Windows
Apply
≈ $99k – $208k per year (Estimated) · In office · 1+ year exp · Bachelor's Degree · San Jose
Apply
≈ $184k – $344k per year (Estimated) · In office · Bachelor's Degree · San Jose
C++
DevOps
GitHub
Apply
≈ $185k – $369k per year (Estimated) · In office · Bachelor's Degree · San Jose
Python
C++
AI/ML
PyTorch
CUDA
Triton
FSDP
NCCL
ROCm
DevOps
Linux
Apply
≈ $197k – $409k per year (Estimated) · In office · Bachelor's Degree · San Jose
Python
C++
AI/ML
LoRA
Fine-tuning
PEFT
PyTorch
Triton
SFT
Post-training
FSDP
ROCm
Apply
See all jobs
This is one of many
2,048,870 more open roles from verified company boards, updated every day.