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Salary
≈ $26k – $59k per year (Estimated)
Location
In office (Bengaluru)
Seniority
Principal · 15+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 12, 2026. First seen by Alion on Oct 9, 2026. Marvell Technology scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Marvell Technology is an American fabless semiconductor company founded in 1995 that designs the infrastructure silicon behind data centres, carrier networks and storage systems. Its portfolio covers electro-optics and digital signal processors for optical links, ethernet switching and physical layer devices, storage controllers, and custom application specific integrated circuits designed for individual cloud operators. Headquartered in Santa Clara and listed on Nasdaq, it reoriented itself over the past decade from consumer and storage chips toward data centre and artificial intelligence infrastructure, which now supplies the majority of its revenue.

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As an Analog Layout Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect

  • Design and develop complex analog, mixed-signal, and custom layouts independently using Cadence Virtuoso and similar EDA tools across advanced nodes (deep sub-micron, FinFET, GAA).
  • Drive end-to-end physical verification of closure, resolving DRC, LVS, ERC, and antenna violations within project timelines.
  • Drive layout architecture, shielding, isolation, EM/IR optimization, and parasitic management.
  • Own layout planning from floor planning to final tapeout.
  • Coordinate across design, verification, package, and physical implementation teams for successful project execution.
  • Support tapeout activities and resolve critical design issues under aggressive schedules.
  • Lead technical discussions, layout reviews, and contribute to knowledge sharing and process improvement initiatives.
  • Serve as the technical focal point for domain expertise within the team.
  • Own cluster, including high-level integration and top-level layout decisions.
  • Provide critical layout feedback influencing circuit quality, performance, and architecture.
  • Apply strong engineering judgment to select optimal layout techniques across projects.
  • Represent the layout team in cross-functional discussions and decision-making forums.
  • Lead big teams or coordinate multiple macro owners to drive project convergence.
  • Act as the key interface between layout and design teams, ensuring clear communication and alignment.
  • Stay updated with evolving semiconductor technologies, tools, and methodologies.

What We're Looking For

  • Bachelor's or master's degree (BE/B.Tech or MS/M.Tech) in Electronics & Communication, Electrical & Electronics, or a related field from a reputed institution.
  • 15+ years of strong experience in high-speed analog, mixed-signal, and custom layout design.
  • Broad exposure across multiple projects, technology nodes, and layout architectures.
  • Deep understanding of electrical engineering fundamentals and layout behavior across advanced nodes.
  • Proven experience in handling complex and critical IPs with end-to-end ownership.
  • Expert-level proficiency in EDA tools, with the ability to influence layout flows and methodologies.
  • Demonstrated ability to introduce innovative and optimized layout solutions for complex designs.
  • Strong track record of delivering high-speed and/or precision analog layouts across multiple process technologies.
  • Expertise in critical layout techniques such as device matching, signal flow optimization, clock routing, shielding, parasitic minimization, biasing, and robust power routing.
  • Solid understanding of reliability considerations including EM/IR, latch-up prevention, ESD protection, and power planning.
  • Strong communication and collaboration skills, with the ability to present to global teams and effectively engage stakeholders across organizational levels.
This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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