Design Verification Engineer

MediaTek • Semiconductors • Wireless • 4 hours ago
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Salary
≈ $45k – $116k per year (Estimated)
Location
In office (Hsinchu)

Confirmed on the employer's own hiring board on Sep 24, 2026. First seen by Alion on Mar 11, 2019.

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MediaTek

MediaTek designs system-on-chip processors for smartphones, televisions and connectivity. Its Dimensity and Helio platforms power hundreds of millions of devices annually. The company is one of the largest fabless chip designers in the world.
mediatek.com • HQ: Hsinchu, Taiwan • Wireless • Semiconductors • Est. 1997
As deep sub-micron process requires longer research cycle and higher manufacture cost, DV(design verification) has become an inevitable part of design group in Mediatek chip development flow.

CDG DV is in charge of development and implementation of smart phone, TV, and ASIC product line verification plan.

It included: integrated simulation/verification env development, big data analysis and efficiency improvement, bus fabric / EMI (External memory interface ) / Low power functions verification plan and implementation

Need to build up verification plan/bench and continuously improve methodology, and you will understand both detail scenario and global view of cell phone/ASIC operating schemes

Need to leverage the latest EDA tool and concept to accomplish the verification plan

Work location: Hsinchu

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