SoC Chip Design Engineer for DFT/DFM

MediaTek • Incident Response • Semiconductors • 6 hours ago
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Salary
≈ $45k – $116k per year (Estimated)
Location
In office (Hsinchu)

Confirmed on the employer's own hiring board on Sep 24, 2026. First seen by Alion on Sep 8, 2026.

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MediaTek

MediaTek designs system-on-chip processors for smartphones, televisions and connectivity. Its Dimensity and Helio platforms power hundreds of millions of devices annually. The company is one of the largest fabless chip designers in the world.
mediatek.com • HQ: Hsinchu, Taiwan • Wireless • Semiconductors • Est. 1997
The successful candidate will be responsible for DFT and DFM methodologies, design, and implementation for our advanced automotive system-on-chip (SoC) designs.

The candidate will also collaborate with the design and layout teams to integrate DFT/DFM requirements.

  • SoC testing architecture design
  • Support project NPI(new product introduction) to MP(mass production) (test program development, coverage enhancement, yield improvement, cost reduction)
  • Cowork w/ IP, test engineer, process team, board design to fulfill CP/FT/SLT test requirement.

#LI-JK1

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