Senior RTL Engineer/Lead
Confirmed on the employer's own hiring board on Sep 24, 2026. First seen by Alion on Apr 14, 2026.
About the Role
We are looking for a Senior RTL Design Engineer / Lead to own micro-architecture, RTL development, integration, and synthesis for complex IP and ARM CPU subsystems. In this role, you will drive RTL quality, collaborate with worldwide (WW) teams on specifications and deliverables, and work closely with DV and PD teams to ensure thoroughly verified, timing-clean designs.
Key Responsibilities
Define micro-architecture for complex IP blocks and ARM CPU subsystems based on high-level specifications.
Develop high-quality RTL (coding and integration) and perform synthesis for complex IP and CPU subsystems.
Run RTL quality checks (e.g., Lint, CDC, LEC/equivalence checks) and ensure RTL is robust, reusable, and signoff-ready.
Generate and refine timing constraints; collaborate with Physical Design teams to ensure RTL meets timing and implementation goals.
Work with DV teams to define test plans, review coverage, and thoroughly verify RTL functionality.
Collaborate with DFT teams to help improve test coverage and support DFT insertion requirements.
Partner with worldwide cross-functional teams to align on specifications, interfaces, and delivery milestones.
Use strong debugging and scripting skills to analyze issues, automate flows, and improve design productivity.