Quantum Engineer - Cryo-CMOS Circuit

Job Description

Job Title: Senior Quantum Engineer - Cryo-CMOS Analog Circuit Design. Location: Redmond, Washington, USA

Job Type: Full-time (Hybrid, 3 days per week in office)

Responsibilities:

• Design and develop CMOS analog circuits and functional blocks for quantum control applications
• Contribute to the architecture and specification of Cryo-CMOS subsystems with system and hardware teams
• Perform simulation and verification of full-custom analog and mixed-signal circuit designs;
• Collaborate with analog, digital, and cryogenic engineering teams to optimize system-level performance
• Support ASIC bring-up, characterization, and integration with quantum control hardware
• Document circuit designs, methodologies, and test results for reproducibility and knowledge sharing
• Contribute to technical publications and internal engineering reports
• Uphold Microsoft's engineering culture and values

Qualifications:

• Bachelor's degree with 6+ years, Master's degree with 4+ years, or PhD with 1+ years of experience in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience
• Experience designing, simulating, and validating analog or mixed-signal CMOS circuits
• Ability to pass Microsoft Cloud Background Check and required government security screenings
• Must meet export control and citizenship verification requirements;
• Ability to leverage AI tools for hardware development, performance modeling, analysis, and workflow automation
• Ability to work in an AI-first engineering environment

Preferred:

• 10+ years of industry experience in analog or mixed-signal circuit design
• At least 4 years of experience designing, simulating, and laying out CMOS analog circuits
• Experience with Electronic Design Automation tools such as Cadence Virtuoso
• Programming or scripting experience in Linux development environments;
• Experience designing Analog-to-Digital Converters (ADCs), Digital-to-Analog Converters (DACs), Phase-Locked Loops (PLLs), and RF components
• Familiarity with Verilog or SystemVerilog and signal integrity for high-performance systems
• Experience with cryogenic circuit design, low-temperature measurements, semiconductor behavior at cryogenic temperatures, and quantum device interfaces
• Hands-on experience with ASIC bring-up, characterization, laboratory validation, and system-level hardware integration
• Strong communication, documentation, collaboration, and technical publication skills

Benefits And Compensation:

• Base salary of USD $119,800 to $234,700 per year across most U.S. locations
• Base salary of USD $160,200 to $261,000 per year for the San Francisco Bay Area and New York City Metropolitan Area
• Eligible roles may receive additional compensation and employee benefits

Other Information:

• Applications are accepted on a rolling basis until the position is filled
• Employment is subject to background checks, security screening, and export control compliance
• Microsoft is an equal opportunity employer committed to diversity and inclusion.