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Salary
≈ $17k – $41k per year (Estimated)
Location
In office (Hyderabad, Bengaluru)
Seniority
Senior · 6+ years exp

First seen by Alion on Aug 11, 2026.

Overview
Company
Impact
Profile match
Mirafra offers semiconductor technology services such as design and verification, design implementation, library and flow development, post silicon validation, IC packaging, etc. It has offices in India, US and Singapore.

Key Responsibilities :

- Build, compile, and deploy GPU SoC emulation models on Synopsys ZeBu platforms.

- Perform design partitioning and mapping for large GPU subsystems, including shader cores, compute units, memory controllers, and interconnects.

- Optimize emulation models for high-bandwidth and concurrency-intensive workloads.

- Debug issues across RTL, compilation, elaboration, and runtime phases.

- Perform initial debug triage and root-cause analysis of test failures.

- Support GPU software bring-up, including firmware, drivers, and kernel integration.

- Enable and debug graphics and compute workloads such as OpenGL and Vulkan.

- Collaborate with Architecture, RTL, Design Verification, and Software teams.

- Drive emulation performance tuning, stability, and turnaround-time improvements.

- Develop automation for build, regression, and emulation workflows.

Required Skills & Experience :

- Bachelor's/Master's degree in Electronics, Electrical, Computer Engineering, or related field.

- 6-9 years of experience in SoC emulation, verification, or related semiconductor domains.

- Strong hands-on experience with Synopsys ZeBu and ZeBu build flows.

- Strong knowledge of Verilog/SystemVerilog.

- Understanding of GPU architecture, including parallel pipelines, scheduling, caches, memory controllers, and memory bandwidth.

- Experience with emulation model build, compilation, debug, and synthesis constraints.

- Strong debugging and problem-solving skills.

- Experience with scripting using Python, Tcl, Shell, or Perl.

Preferred Skills :

- Experience with GPU graphics pipelines or AI accelerators.

- Exposure to Cadence Palladium or Siemens Veloce.

- Knowledge of Vulkan/OpenGL.

- Linux, firmware, or driver bring-up experience.

- Understanding of memory subsystem debugging and performance bottlenecks.

- Experience automating build and regression flows.

Key Deliverables :

- Stable and high-performance GPU emulation models.

- Reduced compile and runtime turnaround time.

- Efficient debugging and triaging of GPU workloads and test failures.

- Automated and scalable emulation build and regression workflows.

Skills

SoC, Verilog, System Verilog, Python, GPU, Emulation, Zebu, RTL, Design Verification

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