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Salary
$255k – $357k per year
Location
In office (Torrance)
Seniority
Principal · 10+ years exp

Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Jun 19, 2026. Neros scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Neros is a defense technology company headquartered in Torrance, California near Los Angeles that designs and mass-produces low-cost FPV, autonomous and interceptor drones for Western militaries, including its Archer FPV system. Founded in 2023 by former drone racers Soren Monroe-Anderson and Olaf Hichwa, it builds its drones in the United States without Chinese supply chains, has offices in Washington, Kyiv and London, and raised a $250 million Series C at a $2.5 billion valuation. It hires mechanical, firmware, PCB, autonomy, UAV systems and manufacturing engineers, FPV test pilots, supply chain and IT staff, and US Army business development leads.

Who we are

Neros is a defense technology company rebuilding America’s drone industrial base. We design and manufacture high-performance unmanned systems that are tested in combat, iterated at startup speed, and built at massive scale. Our team culture is fast, hands-on, and obsessed with closing the gap between design and deployment.

As drones transform the character of warfare, Neros is delivering the systems the West needs to compete on the modern battlefield and deter the adversaries of democracy. We’re hiring engineers, operators, and builders who want to move fast, take on extreme ownership, and get capability into the hands of warfighters in months, not years.

What you will be doing

As a Principal Electrical Engineer at Neros, you will serve as the senior technical authority for our production electronics, owning the hardware development lifecycle from system architecture through detailed design, layout oversight, and high-volume production release. You will define the technical direction of our hardware platform, establish the standard the team is held to, and partner across disciplines on the most complex technical challenges in the product. This is a role for an engineer who brings both the architectural depth to define complex systems and the hands-on experience to execute them at the highest level.

Responsibilities

  • Establish and enforce rigorous design practices including worst-case circuit analysis, component derating, and DFM/DFT/DFR to ensure hardware is reliable and producible at volume
  • Serve as the final technical sign-off authority on all major design decisions, design reviews, V&V plans, and product releases
  • Mentor and guide electrical engineers across all levels, building technical excellence and raising the standard of hardware practice within the team
  • Work with stakeholders and management to define system requirements, validate technical feasibility, and shape the hardware roadmap
  • Provide expert-level technical leadership on complex, multi-disciplinary problems across the organization
  • Communicate architectural vision and design decisions through clear documentation, design reviews, and presentations to technical and executive audiences

You should have the following

  • 10+ years of distinguished experience in electrical hardware design, with deep expertise in high-speed digital design and embedded systems
  • Demonstrated track record of taking products from concept through high-volume production, with hands-on ownership at each stage of the hardware development lifecycle
  • Expert-level proficiency in schematic capture (Altium preferred) with a history of producing and reviewing complex, multi-domain designs
  • Mastery of PCB layout principles for high-speed digital, power, and mixed-signal systems, with proven ability to guide layout to meet stringent SI/PI and EMC requirements
  • Worst-case circuit analysis and design margin methodology practiced as a standard part of the design process
  • Recognized expert in at least one relevant technical domain: power electronics, RF/wireless design, high-speed digital design, or embedded systems architecture
  • Proven experience defining system architecture from requirements and executing through to production hardware
  • Fluency with high-speed serial interfaces (PCIe, MIPI CSI-2, USB 3.x, LVDS, SerDes) and the signal integrity considerations that govern them
  • Experience with DFM, DFT, and EMC/EMI as practiced disciplines with a record of shipping reliable hardware at volume
  • Outstanding communication skills, with the ability to write precise technical documentation and present complex tradeoffs to both engineering teams and executive leadership

Nice to have

  • RF and wireless system design expertise, including antenna design, RF front-end architecture, link budget analysis, and regulatory compliance (FCC/CE) - this is a highly desirable capability given the nature of our products
  • Experience with LoRa, FHSS, or similar long-range wireless technologies
  • Background in UAV, avionics, robotics, or other applications where hardware reliability and operational environment are demanding
  • FPGA design and integration experience within embedded hardware platforms
  • Proficiency with multi-physics simulation tools (Ansys SIwave, HyperLynx, or similar) for signal integrity and power delivery analysis
  • Experience developing technology roadmaps and evaluating silicon vendors and platforms
  • Familiarity with MATLAB/Simulink for system-level modeling
  • Master of Science or PhD in Electrical Engineering or a related field

US Salary Range

$255,000 - $357,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are considered part of Neros' total compensation package.

We’re an equal opportunity employer. We welcome all applicants without attention to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

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