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Salary
≈ $96k – $187k per year (Estimated)
Location
In office (San Jose)
Seniority
Middle

Confirmed on the employer's own hiring board on Oct 15, 2026. First seen by Alion on Oct 9, 2026. Nokia scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Nokia is a Finnish telecommunications equipment company founded in 1865 as a paper mill, which became the world's largest mobile phone maker in the 1990s before selling that business to Microsoft in 2014. It now supplies network infrastructure to operators and enterprises, covering radio access equipment for mobile networks, optical and IP routing for transport networks, fixed broadband access, and a technologies division that licenses its cellular patent portfolio. Headquartered in Espoo and listed in Helsinki and New York, it runs Nokia Bell Labs as its research arm and has been expanding into data centre networking as operator spending has slowed.

We are seeking an ASIC Design Engineer with a solid ASIC/FPGA design strategy & development and debugging skills. "The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise . Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse-combining cutting-edge technology with proven leadership to redefine the future of connectivity.

  • Participation in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
  • Participation in algorithm development, fixed-point modelling and fixed-point performance verification
  • Identifying technical issues and cooperating with senior engineers and other relevant internal groups to resolve those
  • Supporting HW/SW bring-up and debug
  • Work with system architect to define micro-architecture and RTL development
  • Design size/timing/power optimization via micro-architecture/RTL/Synthesis
  • Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
  • Working with verification engineers on test plan based on functional requirements as well as applicable standards requirements
  • Working with experts of different areas to ensure the most competitive solutions
  • Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
  • Supporting HW/SW bring-up and debug
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