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Salary
≈ $46k – $106k per year (Estimated)
Location
In office (Shanghai)
Seniority
Middle · 3+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Aug 27, 2026. NVIDIA scores B on the Alion truth index.

Overview
Company
Impact
Profile match
NVIDIA is an American technology company founded in 1993 that invented the graphics processing unit and has become the dominant supplier of accelerated computing platforms for artificial intelligence. Its portfolio spans data centre GPUs and systems built on the Hopper and Blackwell architectures, GeForce consumer graphics, automotive and robotics platforms, high-speed networking acquired with Mellanox, and the CUDA software stack that binds the ecosystem together. Headquartered in Santa Clara, California, the company sells to cloud providers, enterprises, research institutions and gamers worldwide and is one of the most valuable listed businesses on the Nasdaq.

The NVIDIA GPU clocks group is looking for excellent Senior Formal Verification engineers to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand the clocking requirements for the chip. We also understand the physical restrictions being placed on the clocks by the backend teams. The GPU clocks group architects, designs and validates the clocks RTL. The complexity of clocks RTL has increased many folds to support our features that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

What you’ll be doing:

  • Understand key design behaviors from formal verification view to write clear test plans, and implement them using the latest formal techniques, including the development of environment assumptions, assertions and cover properties.
  • Develop abstraction models to overcome complexity challenges and obtain full proofs, or bounded proofs with sufficient coverage.
  • Debug RTL to identify causes of failure scenarios and finish coverage sign-off.
  • Drive tools to realize their best performance.
  • Contribute to flow and script development to improve team efficiency.
  • Work with architects, designers and others to guarantee good deliverable quality.

What we need to see:

  • BS / MS in CS/CE/EE/Mathematics and related with 3+ years of ASIC verification experience.
  • Knowledge of formal verification methodologies and techniques, preferable experience with Formal Verification Tools (e.g. Jasper Gold, VC Formal ).
  • Able to implement abstraction techniques for effective verification.
  • Excellent command of scripting using TCL, Perl, and Python.
  • Familiar with verification methodology, tools and flow in Unit/Sub-system/SOC level.
  • Excellent interpersonal skills, able to effectively collaborate and work with members of a distributed team.

Ways to stand out from the crowd:

  • Excellent analytical and problem-solving skills, quick understanding to complex design or experience in different verification methodologies is plus.
  • Strong prior knowledge/experience in different protocols/data transmission verification is plus.
  • Fluent English (both written and spoken) and excellent communication skills.
  • Good teamwork spirit, easy to cooperate with team members.
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