368,611open jobs
9,439companies
50,719added this week
Browse all
Salary
$53k – $140k per year (Estimated)
Location
In office (Caen, Sophia Antipolis, Toulouse)
Seniority
Staff
Employment
Full-Time
Overview
Company
Impact
Profile match
NXP Semiconductors is a Dutch semiconductor manufacturer headquartered in Eindhoven and founded in 2006 as a spin-off from Philips. The company designs and produces a wide range of products including microcontrollers, application processors, communication processors, analog and power management devices, and connectivity solutions. It operates globally with manufacturing facilities and research centers across Europe, Asia, and the Americas, primarily serving the automotive, industrial, IoT, and mobile markets.

Position Summary

The Senior Principal Analog Design Engineer / Technical Lead is responsible for leading the design, development, and validation of complex analog and mixed-signal integrated circuits. This role combines deep technical expertise with project leadership, ensuring the successful delivery of high-performance semiconductor products from concept through silicon qualification. The individual serves as a technical reference within the organization, driving innovation, mentoring engineers, and collaborating with cross-functional teams to achieve business and technical objectives.

Key Responsibilities

  • Lead the architecture, design, and verification of analog and mixed-signal blocks, including amplifiers, voltage references, regulators, ADCs/DACs, PLLs, clocking circuits, sensor interfaces, and power management solutions.
  • Develop transistor-level designs and perform detailed simulations to ensure performance across process, voltage, and temperature (PVT) conditions.
  • Drive design reviews, technical risk assessments, and problem-solving activities throughout the product development cycle.
  • Support layout implementation, post-layout verification, silicon bring-up, characterization, and production ramp activities.
  • Collaborate closely with system architects, digital design, verification, layout, product engineering, and manufacturing teams.
  • Define and promote best practices, design methodologies, and continuous improvement initiatives.
  • Provide technical leadership and mentorship to junior and senior engineers, fostering knowledge sharing and professional development.
  • Contribute to technology roadmaps and strategic product development initiatives.

Required Qualifications

  • Master's degree or PhD in Electrical Engineering, Microelectronics, or a related field.
  • Typically >15 years of experience in analog or mixed-signal IC design.
  • Strong expertise in CMOS analog circuit design and analysis.
  • Hands-on experience with industry-standard EDA tools such as Cadence Virtuoso, Spectre, and related simulation and verification environments.
  • Proven track record of successful silicon development and product delivery.
  • Strong understanding of semiconductor device physics, noise analysis, reliability, and design-for-manufacturing considerations.

Key Competencies

  • Technical leadership and decision-making.
  • Advanced problem-solving and analytical skills.
  • Ability to lead complex projects and influence technical direction.
  • Strong communication and stakeholder management capabilities.
  • Effective mentoring and team development skills.
  • Results-oriented with a focus on quality, innovation, and execution.

Expected Impact

The successful candidate will play a key role in delivering robust, high-performance analog solutions, driving first-pass silicon success, advancing design methodologies, and contributing to the development of future products and technologies while serving as a recognized technical leader within the organization.

More information about NXP in France...

#LI-7795
Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
368,611 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Similar stack
Same company
Caen
$21k – $63k per year (gross) • In office • Full-Time
Chips/EDA
Cadence Innovus
Cadence Virtuoso
Synopsys Custom Compiler
Synopsys Design Compiler
Synopsys IC Compiler II
Synopsys PrimeTime
Apply
$21k – $63k per year (gross) • In office • Full-Time • Bachelor's Degree • Saint Petersburg
Chips/EDA
Cadence Innovus
Cadence Virtuoso
Synopsys Custom Compiler
Synopsys Design Compiler
Synopsys IC Compiler II
Synopsys PrimeTime
Apply
$45k – $108k per year (Estimated) • In office • Full-Time • 5+ years exp • Bachelor's Degree • Mexico
DevOps
HPC
Chips/EDA
Cadence Virtuoso
Apply
$102k per year • Remote/Hybrid • Full-Time • Reutlingen
Verilog
Chips/EDA
Cadence Virtuoso
Apply
$102k per year • Remote/Hybrid • Full-Time • Reutlingen
Verilog
Chips/EDA
Cadence Virtuoso
Apply
Remote/Hybrid • Full-Time • 10+ years exp • Bachelor's Degree • Bucharest
C++
Python
C++
LLVM
PyTorch C++
TensorFlow C++
AI/ML
ONNX
PyTorch
TensorFlow
TensorRT
Edge AI
Apply
$54k – $128k per year (Estimated) • In office • Full-Time • 12+ years exp • Master's Degree • Caen • Eindhoven
C++
MATLAB
Python
Apply
$37k – $76k per year (Estimated) • In office • Full-Time • 8+ years exp • Pune
Perl
Python
SystemVerilog
Verilog
AI/ML
AI Agents
Apply
$37k – $77k per year (Estimated) • In office • Full-Time • 12+ years exp • Master's Degree • Pune
C++
Python
AI/ML
Anomaly Detection
AI Agents
DevOps
CI/CD
Apply
$80k – $192k per year (Estimated) • In office • Full-Time • 7+ years exp • PhD • Hamburg
AI/ML
Edge AI
Apply
$54k – $128k per year (Estimated) • In office • Full-Time • 12+ years exp • Master's Degree • Caen • Eindhoven
C++
MATLAB
Python
Apply
$47k – $90k per year (Estimated) • In office • Full-Time • Master's Degree • Caen
Perl
Python
SystemVerilog
Verilog
Chips/EDA
Formal Verification
Apply
$48k – $115k per year (Estimated) • In office • Full-Time • 7+ years exp • Master's Degree • Sophia Antipolis • Caen • Hamburg
Apply
In office • Full-Time • Master's Degree • Caen • Hamburg • Sophia Antipolis
Apply
$65k – $123k per year (Estimated) • In office • Full-Time • 5+ years exp • Caen
C++
Python
Apply
See all jobs
This is one of many
368,611 more open roles from verified company boards, updated every day.