FPGA Digital Design Engineer (m/f/d)
We are looking for an FPGA Engineer to support our Digital Design team at NXP!
Your Responsibilities:
Digital design on FPGA prototyping for System on Chip (SoC)
RTL design, timing constraints and synthesis
Verification of FPGA design, HW/SW co-validation on FPGA platform
Collaboration with stakeholders from different groups (Firmware, Software, Toolchain etc.)
Debugging HW/SW functionality on FPGA platform
Documenting the FPGA platform for usage by other SoC functions
Your Profile:
University Degree in Electrical/Electronic Engineering
Basic programming know-how (e.g. C, Assembly)
Basic knowledge in RTL design (Verilog/System Verilog preferred)
Experience with FPGAs is an advantage
Basic circuit design and PCB design know-how is welcome
Familiarity with computer architecture: knowledge of microcontrollers, bus protocols is preferred
Self-motivated working style
Excellent written and verbal communication skills in English
Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components
Team player mentality and willingness to work with cross functional teams
Please note: The successful candidate may/will be responsible for security related tasks. The assignment may/will be in scope of security certifications, therefore a conscious and reliable way of working is necessary.
For applications in Gratkorn: NXP provides market competitive compensation according to the benchmarking of the electronic and semiconductor industry. Due to the Austrian Equal Treatment Act we are obligated to state the employment group of our applicable collective bargaining agreement (CBA) “Kollektivvertrag für Angestellte Gewerbe und Handwerk und in der Dienstleistung“, this position (fulltime) is graded in Employment Group IV after 2 years. Your individual experiences and expectations will be considered in the application process. Moreover, we provide attractive benefits to our employees like home office, flexible working time, meal benefits and more.
#LI-f8ed