1,829,303open jobs
106,338companies
264,795added this week
Browse all
Salary
≈ $24k – $56k per year (Estimated)
Location
Hybrid (Hyderabad, India)
Seniority
Staff · 10+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Jan 6, 2025. Omni Design Technologies scores D on the Alion truth index.

Overview
Company
Impact
Profile match
Omni Design Technologies is a semiconductor IP company that licenses high-performance, low-power analog and mixed-signal IP cores, including data converters for wideband signal processing, built on advanced FinFET process nodes. Its IP is integrated into system-on-chip designs for wireless, automotive, optical networking and AI applications, with design centres in Bengaluru, Hyderabad, Taipei, Fort Collins and Lisbon. The company is headquartered in Milpitas, California, United States.

Omni Design is working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers.

The Manager of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog/RF engineering, FW engineering, verification, Systems Validation team, Operations, SOC Architects, and report to the Director of ASIC Engineering.

Roles and Responsibilities

  • Manage digital team, hire, and retain best talent
  • Lead SOC integration design team to develop and productize next generation mixed-signal RF/communication SOCs
  • Work with cross-functional project teams to define product specifications, system architecture, HW/SW partitioning, and execution plan
  • Implement best SoC development practices and improve design methodology to maximize efficiency and predictability
  • Deliver chip architecture, design, integration, programming model, verification, and manage hand-off to backend
  • Support Silicon and System Validation, support system integration, and production testing
  • Drive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution

Qualifications

  • BSEE Required, MSEE Preferred
  • Proven track record of success in high-performance/high-volume semiconductor industry
  • SoC, embedded CPU and bus architectures, networking, and control interfaces
  • Communications / DSP algorithms and power / area efficient implementations
  • Digital IC design, design for low power and high speed, design for test (DFT)
  • System modeling, RTL coding, Lint / CDC checking, simulation, synthesis, power analysis, timing analysis in Cadence / Synopsys design environments
  • Directed and constrained random verification, UVM methodology
  • Embedded systems FPGA emulation, lab debug and chip validation
  • Project planning and execution, and performing design tradeoffs to achieve performance, power, die size, and schedule targets
  • Self-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment
  • Senior Management experience preferred
  • Work with architecture, physical design, and design teams to lead the implementation of the digital architecture.
  • Develop and refine specification of the micro-architecture for the digital architecture.
  • Is in tune with industry trends and contributes to consistent roadmap decisions.

Experience

  • 10+ years of experience in the area of RTL design and verification of silicon
  • At Least 3+ years experience in leading low-power mixed-Signal SOC design
  • 10+ years of experience with FPGA architecture specification and design (Altera or Xilinx) for high-speed serial protocols, including USB-SS, PCIe, SATA/SAS, DisplayPort
  • Experience in leading, specifying, and work with Analog/RF team in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs
  • Experience with USB 3.0, DisplayPort, PCIe, or SATA based silicon designs preferred
  • Strong background in analog/mixed-signal integrated SOC Development
  • Strong Hardware design knowledge and familiarity with signal integrity
  • Strong foundation in SoC architecture, design, verification and physical implementation
  • Strong analytical problem solving, and attention to details
  • Knowledge of wireless, mobile, and storage domains
  • Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc.
  • Excellent technical documentation skills
  • Excellent written and verbal communication skills
  • Excellent interpersonal skills, self-motivated, self-starter
  • Experience in startup environment

Expectations

  • Put the RTL for the Full chip together.
  • Evaluate the IP we have to license - like PCIe, LPDDR4, JESD 204C PHY
  • Help develop any BIST
  • Work with Verification Team to develop the FC Simulation test suites
  • Develop the RTL for the various state machines and interfaces
  • Run a few of the simulations
  • Help with the FC simulations debug
  • Help close the timing issues if any come up and work with the PD person to resolve any SI issues.
  • Be a mentor and lead a team of Digital design engineers
  • Work with Systems and Test engineering team to help validate the parts and release them to production
Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
1,829,303 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account Continue with Google
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Hardware
Similar stack
Same company
Hyderabad
RF/Analog Lead 5 months ago
≈ $24k – $55k per year (Estimated) • In office • Full-Time • 15+ years exp • Bachelor's Degree • Bengaluru
Apply
≈ $26k – $60k per year (Estimated) • In office • Full-Time • 10+ years exp • Bengaluru
Python
SystemVerilog
Chips/EDA
Tessent
UVM
Apply
≈ $26k – $59k per year (Estimated) • Hybrid • 8+ years exp • Bachelor's Degree • Bengaluru
Python
C++
AI/ML
Computer Vision
AI Agents
DevOps
Azure DevOps
Azure
CI/CD
Docker
Robotics
Sensor Fusion
Digital Twin
Management
Jira
Agile
Scrum
QA
Selenium
Pytest
Robot Framework
Apply
≈ $24k – $51k per year (Estimated) • In office • Full-Time • 10+ years exp • Bachelor's Degree • Pune
Python
C++
DevOps
RTOS
Apply
≈ $29k – $60k per year (Estimated) • Hybrid • 10+ years exp • Bengaluru
Python
SystemVerilog
Perl
Chips/EDA
Tessent
UVM
Apply
≈ $105k – $270k per year (Estimated) • In office • Full-Time • 7+ years exp • Bachelor's Degree • Tel Aviv
Python
Java
C#
C++
AI/ML
vLLM
LLM
TPU
DevOps
CI/CD
Grafana
Amazon CloudWatch
Apply
In office • Chongqing
Python
C++
Apply
≈ $88k – $151k per year (Estimated) • In office • Full-Time • Bachelor's Degree • London
Python
SQL
DevOps
SOAP
Analytics
Tableau
Power BI
Apply
Sr Developer 15 days ago
≈ $19k – $40k per year (Estimated) • Hybrid • Full-Time • 5+ years exp • Bachelor's Degree • Bengaluru
Python
Go
Java
TypeScript
C#
AI/ML
Copilot
Cursor
Claude Code
AI Agents
RAG
OpenAI Codex
DevOps
GCP
Azure
CI/CD
AWS
Kubernetes
Platform Engineering
Apply
≈ $30k – $63k per year (Estimated) • In office • Full-Time • Hyderabad
Python
Apply
≈ $25k – $58k per year (Estimated) • Hybrid • Full-Time • 10+ years exp • Bengaluru
Python
Apply
≈ $17k – $42k per year (Estimated) • Hybrid • Full-Time • 3+ years exp • Hyderabad • Bengaluru
Python
AI/ML
BERT
Apply
≈ $17k – $43k per year (Estimated) • Hybrid • Full-Time • 3+ years exp • Hyderabad • Bengaluru
Python
Verilog
SystemVerilog
Perl
DevOps
Linux
Chips/EDA
UVM
Synopsys Verdi
Apply
≈ $18k – $44k per year (Estimated) • Hybrid • Full-Time • 4+ years exp • Hyderabad • Bengaluru
Python
Verilog
C++
SystemVerilog
Perl
SystemC
Chips/EDA
UVM
Apply
≈ $24k – $55k per year (Estimated) • Hybrid • Full-Time • 3+ years exp • Hyderabad
Python
Verilog
C++
SystemVerilog
Perl
DevOps
Linux
Chips/EDA
UVM
Synopsys Verdi
Apply
≈ $30k – $79k per year (Estimated) • In office • 8+ years exp • Bachelor's Degree • Hyderabad
Python
Go
JavaScript
C#
C++
Objective-C
Apply
In office • Internship • Bachelor's Degree • Hyderabad
Python
AI/ML
Model Context Protocol
AI Agents
AWS Bedrock AgentCore
DevOps
Rest API
Management
ServiceNow
Agile
Apply
In office • Internship • PhD • Hyderabad
Python
Java
Databases
Snowflake
Databricks
AI/ML
AI Agents
Anomaly Detection
Edge AI
DevOps
Platform Engineering
Analytics
Master Data Management
Collibra
Management
Agile
Apply
≈ $8.5k – $17k per year (Estimated) • In office • Internship • Bachelor's Degree • Hyderabad
AI/ML
Knowledge Graph
DevOps
Platform Engineering
Analytics
Master Data Management
Management
Agile
Apply
In office • Full-Time • Bachelor's Degree • Cairo • Hyderabad • Noida
Apex
Apex
MuleSoft
DevOps
Rest API
OpenShift
API Gateway
SOAP
Apply
See all jobs
This is one of many
1,829,303 more open roles from verified company boards, updated every day.