Analog Design Engineer (ADC/DAC)

About the Role

당사는 Flash 또는 memory-based readout 회로에 적용되는 고성능 ADC/DAC 및 핵심 아날로그/혼성신호 블록을 설계할 경력직 아날로그 회로설계 엔지니어를 찾고 있습니다.

본 포지션은 SAR ADC, Single-Slope ADC, DAC/Ramp Generator, Comparator, OP Amp, Bandgap Reference(BGR) 등 ADC/DAC 및 관련 Analog IP의 아키텍처 정의, 트랜지스터 레벨 회로설계, 시뮬레이션, layout 협업, post-layout 검증, silicon characterization 업무를 담당합니다.

Flash, Digital, Layout, Design Verification, Silicon Bring-up 팀과 협업하여 memory readout 회로의 성능, 전력, noise, sampling speed, SNR 등 핵심 성능 지표를 달성하는 역할을 수행합니다.

Key Responsibilities

ADC/DAC 및 Analog IP 설계: Flash 또는 memory-based readout 회로에 적용되는 ADC/DAC 및 관련 Analog IP의 아키텍처 정의, 트랜지스터 레벨 회로설계 및 시뮬레이션을 수행합니다.

Data Converter 설계: SAR ADC, Single-Slope ADC, DAC, Ramp Generator 등 data converter 구조를 설계하고 성능을 최적화합니다.

Block-Level Analog 설계: Comparator, OP Amp, Bandgap Reference(BGR), reference/bias circuit, ADC calibration 관련 회로 등 핵심 아날로그 블록을 설계하고 검증합니다.

AMS Simulation 및 검증: PVT corner, transient, AC/DC, noise, linearity, mismatch, Monte Carlo, post-layout simulation 등을 통해 회로 성능과 설계 리스크를 검증합니다.

Layout 협업 및 Post-layout 검증: Layout Engineer와 협업하여 device matching, symmetry, shielding, parasitic mitigation, noise coupling 방지 등 custom analog layout guideline을 제공하고 PEX 기반 post-layout 성능 검증을 수행합니다.

Silicon Characterization 및 Debug: Tape-out 이후 test chip 또는 silicon 측정 결과를 분석하고, SNR, SNDR, ENOB, sampling speed, offset, gain error, INL/DNL, power consumption 등 ADC/DAC 성능 지표를 검증·최적화합니다.

Cross-functional Collaboration: Flash, Digital, Layout, Design Verification, Physical Design, Silicon Bring-up 팀과 협업하여 mixed-signal integration, calibration, interface 검증, silicon debug 업무를 수행합니다.

문서화 및 설계 리뷰: 설계 사양서, 시뮬레이션 결과, layout guideline, 검증 보고서, silicon characterization report를 작성하고 설계 리뷰에 참여합니다.

Qualifications

경력: Analog/Mixed-Signal IC 설계 분야에서 5년 이상의 실무 경험을 보유하신 분

(관련 전공의 석사 졸업자의 경우 관련 분야 2년 이상의 실무 경험 보유자)

Analog/Mixed-Signal IC 설계 경험: CMOS 기반 아날로그/혼성신호 IC의 transistor-level 설계 및 시뮬레이션 경험을 보유하신 분

ADC/DAC 또는 Analog IP 경험: SAR ADC, Single-Slope ADC, DAC, Ramp Generator, Comparator, OP Amp, BGR, reference/bias circuit 등 ADC/DAC 또는 관련 Analog IP 설계 경험을 보유하신 분

EDA Tool 활용 역량: Cadence Virtuoso, Spectre, HSPICE 또는 이에 준하는 analog IC 설계/시뮬레이션 tool 사용 경험을 보유하신 분

Simulation 역량: PVT corner, noise, mismatch, Monte Carlo, post-layout simulation 등 회로 검증 경험을 보유하신 분

Layout 이해도: device matching, parasitic effect, shielding, symmetry, noise isolation 등 custom analog layout 고려사항에 대한 이해를 보유하신 분

학력: 전기전자공학, 반도체공학 또는 관련 전공 학사 이상 학위 보유자

소프트 스킬: 원활한 커뮤니케이션 역량, 부서 간 협업 능력 그리고 ADC/DAC, Memory Readout, Analog/Mixed-Signal IC 기술에 대한 높은 관심과 이해를 갖춘 분

Preferred Qualifications

SAR ADC, Single-Slope ADC, DAC, Ramp Generator 등 Data Converter 설계 경험 보유자

Comparator, OP Amp, Bandgap Reference(BGR), Reference/Bias Circuit 등 아날로그 IP 설계 경험 보유자

Flash, Memory Readout Circuit, Computing-in-Memory(CIM) 관련 회로 설계 경험 보유자

ADC/DAC Calibration, Offset/Gain Correction, Trimming 등 보정 회로 설계 경험 보유자

Tape-out, Test Chip, Silicon Validation, Post-Silicon Characterization 경험 보유자

Calibre DRC/LVS/PEX, Fast-SPICE Simulator 등 EDA Tool 활용 경험 보유자

PVT, Noise, Mismatch, Monte Carlo, Post-layout Simulation 등 회로 검증 경험 보유자

MATLAB, Python, C 기반 분석·자동화 경험 보유자

Analog/Mixed-Signal IC 설계 관련 석사 또는 박사 학위 보유자

전형절차

서류전형 - 1차 실무 면접 - 2차 컬처핏 면접 - 입사

*영문 입사지원서로 제출하여 주시기 바랍니다.

About the Role

We are looking for an experienced Analog Circuit Design Engineer to design high-performance ADC/DAC and key analog/mixed-signal blocks for Flash or memory-based readout circuits.

This position will be responsible for architecture definition, transistor-level circuit design, simulation, layout collaboration, post-layout verification, and silicon characterization of ADC/DAC and related Analog IPs, including SAR ADC, Single-Slope ADC, DAC/Ramp Generator, Comparator, OP Amp, and Bandgap Reference (BGR).

You will work closely with Flash, Digital, Layout, Design Verification, and Silicon Bring-up teams to achieve key performance metrics for memory readout circuits, including performance, power, noise, sampling speed, and SNR.

Key Responsibilities

ADC/DAC and Analog IP Design: Define the architecture, perform transistor-level circuit design, and run simulations for ADC/DAC and related Analog IPs used in Flash or memory-based readout circuits.

Data Converter Design: Design and optimize data converter architectures such as SAR ADC, Single-Slope ADC, DAC, and Ramp Generator.

Block-Level Analog Design: Design and verify key analog blocks, including Comparator, OP Amp, Bandgap Reference (BGR), reference/bias circuits, and ADC calibration-related circuits.

AMS Simulation and Verification: Verify circuit performance and design risks through PVT corner, transient, AC/DC, noise, linearity, mismatch, Monte Carlo, and post-layout simulations.

Layout Collaboration and Post-Layout Verification: Work closely with Layout Engineers to provide custom analog layout guidelines, including device matching, symmetry, shielding, parasitic mitigation, and noise coupling prevention, and perform PEX-based post-layout performance verification.

Silicon Characterization and Debug: Analyze test chip or silicon measurement results after tape-out, and verify and optimize ADC/DAC performance metrics such as SNR, SNDR, ENOB, sampling speed, offset, gain error, INL/DNL, and power consumption.

Cross-functional Collaboration: Collaborate with Flash, Digital, Layout, Design Verification, Physical Design, and Silicon Bring-up teams on mixed-signal integration, calibration, interface verification, and silicon debug activities.

Documentation and Design Review: Prepare design specifications, simulation results, layout guidelines, verification reports, and silicon characterization reports, and participate in design reviews.

Qualifications

Experience: 5+ years of hands-on experience in Analog/Mixed-Signal IC design.

(Candidates with a master’s degree in a related field and 3+ years of relevant hands-on experience may also be considered.)

Education: Bachelor’s degree or higher in Electrical Engineering, Semiconductor Engineering, or a related field.

Analog/Mixed-Signal IC Design Experience: Hands-on experience in transistor-level design and simulation of CMOS-based analog/mixed-signal ICs.

ADC/DAC or Analog IP Experience: Experience designing ADC/DAC or related Analog IPs, such as SAR ADC, Single-Slope ADC, DAC, Ramp Generator, Comparator, OP Amp, BGR, and reference/bias circuits.

EDA Tool Proficiency: Experience using analog IC design and simulation tools such as Cadence Virtuoso, Spectre, HSPICE, or equivalent tools.

Simulation Skills: Experience with circuit verification, including PVT corner, noise, mismatch, Monte Carlo, and post-layout simulations.

Layout Understanding: Understanding of custom analog layout considerations, including device matching, parasitic effects, shielding, symmetry, and noise isolation.

Soft Skills: Excellent communication skills, cross-functional collaboration skills, and a strong interest and understanding of ADC/DAC, memory readout, and analog/mixed-signal IC technologies.

Preferred Qualifications

Experience designing data converters such as SAR ADC, Single-Slope ADC, DAC, and Ramp Generator.

Experience designing Analog IPs such as Comparator, OP Amp, Bandgap Reference (BGR), and reference/bias circuits.Experience designing circuits related to Flash, memory readout circuits, or Computing-in-Memory (CIM).

Experience designing calibration circuits such as ADC/DAC calibration, offset/gain correction, and trimming.

Experience with tape-out, test chips, silicon validation, or post-silicon characterization.

Experience using EDA tools such as Calibre DRC/LVS/PEX and Fast-SPICE simulators.

Experience with circuit verification, including PVT, noise, mismatch, Monte Carlo, and post-layout simulations.

Experience with analysis and automation using MATLAB, Python, or C.

Master’s or Ph.D. degree related to Analog/Mixed-Signal IC design.