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Salary
$200k – $350k per year
Location
In office (Austin)
Seniority
Architect · 12+ years exp
Employment
Full-Time
Overview
Company
Impact
Profile match
Positron AI builds purpose-built inference servers for large language models, aiming for much higher energy efficiency than general-purpose GPU systems. Its Atlas hardware uses field-programmable logic and a memory-centric design to serve transformer models at high token throughput. The company was founded in 2023 and assembles its systems in the United States.

About Positron AI

Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Our first-generation ASIC, Asimov, is a cutting-edge accelerator targeting frontier AI workloads, with additional generations already underway.

Role Overview

We are looking for a Director of Silicon Validation to own the complete verification and validation lifecycle of our AI inference silicon, from pre-silicon functional verification, through hardware emulation, to post-silicon bring-up and production validation. This leader owns the question every tape-out depends on: is the design correct, and how do we know? The ideal candidate has led verification and validation organizations through multiple successful tape-outs, is equally at home in a SystemVerilog code review and in a post-silicon lab, and has built the methodology and infrastructure that lets a team scale through leverage rather than headcount alone.

This is an Austin, TX based role. We do not yet have a physical office in the area, but we are planning to open one. Once established, employees will be expected to work in a hybrid capacity, splitting time between in-office and remote work.

Key Responsibilities

Verification & Validation Leadership

  • Lead and grow three interlocking disciplines: pre-silicon design verification, hardware emulation, and post-silicon validation and bring-up.
  • Own the verification strategy, test plans, and coverage closure criteria that gate tape-out, and make the data-driven readiness recommendation to executive leadership.

Test Strategy & Emulation Infrastructure

  • Define what content runs where across simulation, emulation, FPGA prototyping, and silicon to maximize bug discovery per engineering day and per compute dollar.
  • Build and scale the emulation environment into the platform that enables firmware and software bring-up well ahead of first silicon.

Post-Silicon Bring-Up & Debug

  • Establish the post-silicon bring-up plan, lab infrastructure, and on-chip observability and debug strategy before tape-out, and lead the bring-up effort when silicon arrives.
  • Drive bug triage, root cause analysis, escape analysis, and errata management, and own the respin-versus-workaround recommendation.

Cross-Functional Partnership & Program Infrastructure

  • Partner with design, DFT, physical design, firmware, and software teams so that verification intent, debug hooks, and test content are designed in rather than bolted on.
  • Own regression infrastructure, compute and license capacity planning, and continuous integration for verification and emulation workloads.
  • Manage relationships with EDA and emulation vendors, verification IP suppliers, and third-party IP providers.

Team Building

  • Recruit, mentor, and develop a high-performing verification and validation organization across multiple sites.

Required Qualifications

  • A degree in Electrical Engineering, Computer Engineering, or a related field.
  • 12+ years of experience in ASIC verification and/or silicon validation, including at least 5 years in a leadership role.
  • A proven track record taking multiple complex ASICs from verification planning through successful first silicon and production ramp.
  • Deep hands-on expertise in SystemVerilog, UVM, constrained-random verification, functional coverage, and assertion-based verification.
  • Demonstrated ownership of a hardware emulation platform (Cadence Palladium, Siemens Veloce, or Synopsys ZeBu), including model build flows, capacity and partitioning, transactors, and co-emulation.
  • Experience leading post-silicon bring-up, including first power-on, boot, interface training, characterization, and silicon debug.
  • A strong understanding of high-speed interface and memory subsystem validation, including PCIe, LPDDR/HBM, SerDes, and coherent interconnect.
  • Working knowledge of DFT, ATPG, and MBIST, and how test structures interact with verification and bring-up.
  • Experience defining verification sign-off criteria and presenting readiness data to executive stakeholders.
  • Excellent leadership, communication, and cross-functional collaboration skills.

Preferred Qualifications

  • Experience verifying and validating AI/ML accelerators, high-performance computing (HPC), or data center silicon.
  • Firmware or embedded software bring-up experience, including booting a bootloader or Linux on emulation or first silicon.
  • Hands-on deployment of formal verification methodology alongside simulation-based verification.
  • Experience with Arm-based subsystems and coherent mesh interconnects.
  • Familiarity with virtual prototyping, performance validation, and correlating silicon results to pre-silicon models.
  • A track record building verification automation and applying AI-assisted tooling to verification and debug workflows.
  • Experience scaling a validation organization across multiple geographic sites.
  • A successful track record of technology development within a dynamic start-up environment.

Leveling & Scope

While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.

Why Join Us?

  • Be at the forefront of AI inference hardware innovation, working alongside a world-class team of engineers and AI researchers.
  • Help shape the future of AI acceleration technology, backed by competitive compensation, equity, and benefits.

Compensation & Benefits

The base salary range for this role is $200,000 - $350,000.

Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.

At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.

Benefits & Perks

We want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future.

Health and wellness

  • Fully company-paid medical, dental, and vision insurance for you and your dependents
  • Company-paid life and disability coverage, with voluntary options to add more
  • Supplemental hospital, critical illness, and accident coverage available

Time off and flexibility

  • Unlimited paid time off, we encourage everyone to truly unplug and recharge
  • 13 paid company holidays
  • Remote-first culture with a company-provided computer and home office setup

Compensation and future

  • Competitive salary and equity
  • 401(k) with company matching, eligible from day one

Visa Support

This position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates.

Equal Opportunity Employer. If you're excited about the role but don't meet every bullet, we'd still love to hear from you.

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