CPU Tools, Platform & QA - Staff / Senior Staff Engineer

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General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/opticalsystems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

We are looking for a Staff / Senior Staff CPU Tools, Platform & QA Engineer to drive the quality, validation, automation, and scalability of CPU engineering infrastructure across the complete product lifecycle - from testbench and emulation platforms through firmware and silicon.

The role will have broad technical ownership across CPU tools, PnP (Power & Performance), telemetry, regression infrastructure, firmware, and platform QA ( BareMetal and OS based Frameworks test execution etc.)

This is a senior technical leadership role requiring strong CPU fundamentals, software/firmware expertise, validation and automation experience, and the ability to debug complex issues spanning CPU hardware, tools, firmware, emulation, and silicon.

Key Responsibilities

• Define and drive end-to-end QA and validation strategy for CPU tools and platforms across:
  • Pre-silicon testbenches
  • Emulation platforms
  • Firmware / bare-metal environments
  • Silicon platforms
  • Post-silicon labs
• Own quality and validation of CPU infrastructure including:
  • CPU firmware and low-level software
  • Platform testbenches
  • PnP infrastructure
  • Telemetry and data-collection frameworks
  • Regression and automation infrastructure
• Drive Power & Performance (PnP) framework validation, including automated execution, data collection, analysis, regression detection, and correlation across platforms.
• Develop and maintain telemetry regression frameworks to track CPU performance, power, functional, and system-level metrics across builds, platforms, and silicon generations.
• Establish automated nightly/weekly regression pipelines, including:
  • Test execution
  • Telemetry collection
  • Golden-data comparison
  • Performance/power deviation analysis
  • Regression detection
  • Failure triage
  • Dashboards and reporting
• Build mechanisms to correlate emulation, testbench, and silicon results, enabling early identification of potential silicon issues.
• Define quality gates and release criteria for CPU tools, firmware, PnP infrastructure, telemetry, and platform releases.
• Drive root-cause analysis of failures spanning CPU architecture, firmware, tools, test infrastructure, emulation, and silicon.
• Identify systemic gaps in test coverage, telemetry, automation, and regression infrastructure and drive solutions across engineering organizations.
• Develop scalable frameworks that transition CPU validation from manual execution to automated, data-driven QA.
• Partner closely with CPU architecture, design, firmware, CAD, validation, performance, power, emulation, and post-silicon teams.
• Lead technical initiatives across multiple CPU programs and generations.
• Mentor engineers and provide technical direction to distributed engineering teams.

PnP & Telemetry Responsibilities

• Define methodology for CPU power and performance characterization and regression.
• Build automated pipelines for collecting and analyzing:
  • CPU performance metrics
  • Frequency / Fmax behavior
  • Power metrics
  • Performance counters / telemetry
  • Workload-level KPIs
  • Platform health metrics
• Establish golden baselines and deviation thresholds for automated regression detection.
• Develop correlation between pre-silicon models, emulation, and silicon telemetry.
• Detect performance/power regressions early and drive cross-functional debug to root cause.
• Build dashboards providing clear visibility into CPU quality, performance, power, and platform health.
• Enable scalable telemetry analysis across large regression datasets and multiple CPU programs.

Required Qualifications

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• 10+ years of relevant engineering experience, with demonstrated technical leadership at Staff/Senior Staff level.
• Strong understanding of CPU architecture, system architecture, and low-level software.
• Experience in CPU validation, post-silicon, emulation, firmware, performance, power, or system-level engineering.
• Strong programming skills in C/C++ and Python.
• Experience developing automation, regression, CI/CD, telemetry, and QA frameworks.
• Strong debugging skills across hardware/software boundaries.
• Experience analyzing large datasets and identifying performance, power, functional, or telemetry regressions.
• Ability to lead complex cross-functional debug and drive issues to closure.
• Strong written and verbal communication skills.

Preferred Qualifications

• Experience with ARM / ARM64 CPU architecture and ISA.
• Experience with CPU Power & Performance (PnP) validation.
• Experience with CPU performance counters, telemetry, profiling, and workload characterization.
• Experience with Veloce, Palladium, or equivalent emulation platforms.
• Experience with CPU firmware, bare-metal environments, Linux, and low-level debugging.
• Experience with post-silicon CPU validation and silicon debug.
• Experience developing large-scale regression infrastructure and data analytics.
• Experience establishing golden-data based regression and automated quality dashboards.
• Experience across multiple CPU generations or complex SoC programs.

Staff / Senior Staff Leadership Expectations

At this level, the engineer is expected to:

• Drive technical strategy and architecture, not just execute individual projects.
• Own quality across the Tools → Firmware → Testbench → Emulation → PnP/Telemetry → Silicon ecosystem.
• Identify systemic problems and develop solutions that scale across CPU programs.
• Influence architecture, infrastructure, and validation methodologies.
• Lead complex cross-functional technical investigations.
• Establish engineering standards for automation, regression, telemetry, and quality.
• Mentor engineers and raise the technical bar across the organization.

Core Ownership Areas

CPU Tools | Firmware | Testbenches | Emulation | Silicon | PnP | Telemetry | Regression | QA | Automation

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