Location
In office (Chennai)
Seniority
Senior · 4+ years exp
First seen by Alion on Nov 10, 2026.
Overview
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Profile match
Qualcomm is a semiconductor and wireless technology company founded in 1985 that designs processors, modems and connectivity chips for mobile devices and other markets. Its offices in Bengaluru and Chennai hire physical design and SoC RTL design engineers for chip implementation, timing closure and power optimisation. The company is headquartered in San Diego, California, United States.
Join Qualcomm's cutting-edge hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). You will work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential to ensure seamless integration and performance across subsystems.
Key Responsibilities:
- Develop and execute verification plans for complex SoC designs and IP blocks.
- Architect and implement testbenches using System Verilog and UVM/OVM methodologies.
- Perform RTL verification, simulation, and debugging.
- Collaborate with design, architecture, and software teams to ensure functional correctness.
- Contribute to IP design reviews and sign-off processes.
- Support post-silicon validation and bring-up activities.
- Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance.
- Conduct CPU subsystem verification (ARM/RISCV) including coherency, cache behavior, and interrupt handling.
- Perform power-aware verification using UPF/CPF and validate low-power design intent.
- Execute performance verification to ensure bandwidth, latency, and throughput targets are met.
- Perform gate-level and timing simulations to sign off on timing closure.
- Analyze and verify serial peripherals like UART/SDIO/SPI and validate the datapath integrity.
Preferred Skills & Experience:
- 4-10 years of experience in digital design and verification.
- Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB.
- Experience with CPU (ARM/RISCV) subsystem verification and performance modeling.
- Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus.
- Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python).
- Experience with power-aware verification methodologies and tools (e.g., UPF, CPF).
- Familiarity with performance verification techniques and metrics.
- Exposure to tools like ClearCase/Perforce and simulation/debug environments.
- Strong analytical, debugging, and communication skills.
Minimum Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
Job Description Minimum Qualifications:
- Bachelor's or master's degree in Electrical/Electronic Engineering, Computer Science, or related field.
- Relevant experience in hardware design verification.
Skills
802.11, OVM, SystemVerilog, UVM, WLAN
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