Power Design Engineer, up to Staff

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Job Area:

General Summary:

Qualcomm Cloud System Hardware Engineering team develops cutting-edge rack level AI inference solutions for next generation liquid-cooled data centers. As part of its rapid expansion, the team is looking for experienced engineers to join and contribute to the next round of innovative AI products that Qualcomm will bring to the market.

• Support board-level power architecture and power integrity (PI) design from early concept and architecture definition through design implementation, validation, qualification, and production release.
• Support to define power architecture, power budgets, rail requirements, sequencing, and performance targets, and serve as the technical lead for power-related design reviews, validation, troubleshooting, and root-cause analysis.
• Support power delivery network (PDN) design and optimization for GPU boards, including rail partitioning, voltage regulator (VR) selection, power-plane design, decoupling strategy, impedance targets, and transient load requirements.
• Work closely with power semiconductor and power-supply vendors to evaluate and optimize regulator solutions for product requirements, including configuration and tuning of programmable voltage regulators.
• Perform frequency-domain and time-domain PI analysis, including PDN impedance, resonance, voltage ripple/noise, transient response, and circuit/PDN co-simulation to identify and mitigate power-integrity risks before hardware build.
• Develop and maintain board-level power and PI design guidelines, covering PCB stack-up, materials, power/ground planes, via structures, component placement, routing, decoupling, and layout requirements for internal design teams and external partners.
• Use advanced 2D/3D electromagnetic and PI simulation tools to model and optimize power planes, vias, packages, connectors, sockets, and other critical interconnect structures.
• Lead power bring-up, characterization, and design correlation in the lab using high-bandwidth oscilloscopes, VNAs, TDRs, current probes, electronic loads, and related measurement equipment. Correlate simulation models with measured hardware behavior and continuously improve design methodologies.
• Partner with PCB, SI/PI, system, thermal, mechanical, validation, firmware, manufacturing, and supplier teams to resolve cross-functional power issues and drive designs to production readiness.

What we need to see

• B.S. or M.S. in Electrical Engineering or a related discipline, or equivalent relevant industry experience.
• 5+ years of industry experience in board-level power design, power integrity, PDN analysis, or high-performance computing/networking hardware.
• Strong understanding of power electronics, electromagnetics, transmission-line effects, PDN impedance, decoupling, resonance, and transient behavior, with demonstrated ability to apply these principles to real hardware designs.
• Strong experience with multi-rail power architectures and voltage regulators, including regulator selection, power-stage design, sequencing, telemetry, compensation/tuning, transient response, and programmable regulator configuration.
• Expert proficiency with industry-standard EM/PI simulation tools, such as Ansys SIwave, Q3D, HFSS, CST, or equivalent, together with SPICE-based circuit and time-domain simulation.
• Proven experience performing PDN analysis, including model generation, impedance target definition, resonance identification and mitigation, decoupling optimization, and time-domain voltage-noise/transient simulations.
• Hands-on laboratory experience performing power and PI characterization and debug, using equipment such as oscilloscopes, VNAs, TDRs, current probes, and electronic loads, including simulation-to-measurement correlation.
• Experience taking complex board designs through bring-up, validation, qualification, debug, and production release, with a strong understanding of how power-design decisions affect system reliability and manufacturability.
• Strong technical ownership, problem-solving, and communication skills, with the ability to work independently and drive issues across multi-disciplinary engineering teams, ODMs, and component suppliers.

Nice to have

• Experience with power delivery for AI accelerators, CPUs/SoCs, high-speed networking ASICs, GPUs, or other high-current computing platforms.
• Experience with high-current multiphase VR solutions, dynamic voltage/current requirements, telemetry, margining, and power-management interfaces.
• Familiarity with the interaction between power integrity, signal integrity, thermal design, PCB technology, and package-level power delivery.
• Experience developing power validation methodologies, design checklists, simulation flows, and correlation processes that can be reused across multiple products.
• Experience working directly with ODM/JDM partners and semiconductor/power vendors from architecture definition through mass production.

Minimum Qualifications:

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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