RFIC Circuit Design Engineer, Senior

Company:

Job Area:

General Summary:

Qualcomm's Radio Frequency Integrated Circuit (RFIC) design center in Bangalore designs advanced cellular RFIC's which enable 2G, 3G, 4G and 5G transceivers for the world wide cellular chipset market. We are looking for experienced RF/Analog IC design engineers to join the existing RF design team. We welcome international applicants wishing to relocate to India and Qualcomm provides a highly cosmopolitan and challenging work environment with ample opportunities in innovation & patenting. Qualcomm also collaborates intensely with premium Indian Universities and Institutes in RF/Analog domain. *Please note this position is located in Bangalore, India.

Typical designs that we do in BDC include: Driver Amplifiers, LNA (Low Noise Amplifier), Up/Down Conversion Mixers, Base Band Filters, DLL (Delay Locked Loop), PLL (Phase Locked Loop), High Frequency Dividers, VCO (Voltage Controlled Oscillators), Voltage and Current References.

Required:

1. Receivers: LNA, Down conversion Mixers and Base band Filters, Auxiliary Receivers

2. Transmitters: Transmit Base-Band Filters, Up-conversion Mixers, Driver / Power Amplifiers

3. Synthesizers: VCO, PLL, Reference Clock Processing, DLL and Clock Multipliers, Clock & Data Recovery

4. Data Convertors: ADC, DAC

Desired:

5. Power Management: Bandgap, LDO, Reference Current Generation.

6. RF Calibration & Implementation

7. Radio floor planning, Frequency planning & Packaging

Responsibilities/Skills

- In-depth understanding of Analog/RF IC circuit design, IC design tools and simulators, and IC layout design, techniques, and verification methodologies

- Expertise in RF/Analog circuit design in sub-90nm CMOS.

- Experience with front-end RF and Analog circuit blocks such as LNAs and Mixers, TX modulators and driver amplifiers, Frequency Synthesizers/Phase Lock Loops(PLLs), Continuous-Time Filters and ADC/DAC designs.

- Knowledge of LTE, LTE-NR, CDMA2000, 1X-EVDO, WCDMA, UMTS, and GSM/GPRS/EDGE chipsets is a plus.

- Knowledge of Wireless Connectivity Technologies is a plus.

3+ years of experience

Minimum Qualifications:

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

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