368,657open jobs
9,442companies
50,883added this week
Browse all
Salary
$179k – $332k per year
Location
In office (San Jose)
Seniority
Architect · 10+ years exp
Employment
Full-Time
Overview
Company
Impact
Profile match
Semiconductor Engineering is a technical media and research organization based in San Jose, California, and founded in 2013. The company provides in-depth news, analysis, and technical papers focused on the design, manufacturing, testing, and integration of advanced semiconductor technologies. It operates as a global information hub for chip engineers and industry professionals, offering newsletters, webinars, and specialized research reports.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

About Cadence

Cadence is a pivotal leader in electronic systems design, applying its Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems. Within Cadence, the Custom & PCB Group (CPG) is responsible for the custom, analog, RF, and mixed-signal design solutions used by design teams worldwide, anchored by the industry-standard Virtuoso platform.

The Role

We are hiring a Director, Product Management to own the strategy, roadmap, and go-to-market for a product line within CPG's custom and analog design portfolio. This is a role for a product leader with genuine analog credibility - someone who can sit across from senior analog circuit designers, speak their language, understand the problems they lose sleep over, and earn the technical trust required to influence how they work.

Analog and custom designers are expert, discerning, and rightly protective of proven methodologies. Success in this role depends on the depth to engage them as a peer, the judgment to prioritize what genuinely moves their productivity, and the influence to align R&D, sales, and marketing behind a single, well-articulated plan. Reporting to CPG Product Management leadership, you will translate deep customer insight into a compelling product and drive its adoption across demanding analog and custom design teams.

Key Responsibilities

  • Engage and influence expert practitioners. Build deep, credible relationships with senior analog and custom circuit designers and their leadership; understand their design challenges first-hand, and earn the technical trust needed to shift entrenched methodologies and drive adoption of Cadence solutions.

  • Own the product. Set the vision, strategy, multi-year roadmap, detailed requirements, and release priorities for your product line, grounded in direct customer and market feedback from analog design teams.

  • Go-to-market. Own positioning, messaging, and technical value narrative; articulate - in terms analog designers respect - how the product improves their productivity and time-to-results, and equip sales and field teams to carry that story.

  • Drive adoption & revenue. Lead key customer engagements and business-development activity; convert skeptical, high-expertise design teams into active users and advocates, and grow adoption and revenue across strategic accounts.

  • Pricing & packaging. Define how the product is packaged, priced, and licensed, partnering with commercial and deal-desk teams on terms that win and scale.

  • Competitive & market intelligence. Continuously monitor the analog, mixed-signal, and broader semiconductor design landscape; translate trends and competitive moves into product and positioning decisions.

  • Cross-functional leadership. Align R&D, sales, marketing, and other stakeholders around a single coherent plan, and represent the product in executive, analyst, partner, and customer forums.

  • Build the team. As the product scales, hire, coach, and develop product managers - leading by context, not control - and instill rigorous product discovery and delivery practices.

  • Measure what matters. Define and track the success metrics for the product line: adoption and active usage, customer productivity impact, pipeline, and revenue.

Required Qualifications

  • Deep, hands-on understanding of analog and mixed-signal circuit design - circuit topologies, device-level design, sizing and biasing, layout and parasitics, PVT and corner behavior, and verification methodology - and a first-hand grasp of the real challenges analog teams face (long design cycles, designer ramp-up, layout closure, cross-node migration).

  • Proven ability to communicate credibly with and influence expert analog circuit design engineers - the technical depth and presence to be taken seriously by senior designers, and the persuasive skill to change how experienced practitioners work.

  • 10+ years in the semiconductor / EDA industry, including 5+ years in product management, product marketing, or product-line ownership.

  • Demonstrated ownership of a product or product line - roadmap, requirements, pricing/packaging, and go-to-market - with accountability for adoption and revenue.

  • Strong executive-communication skills and the ability to lead by influence across R&D, sales, and marketing.

  • BS or MS in Electrical Engineering or a related field; MSEE with an analog / mixed-signal specialization strongly preferred.

Preferred Qualifications

  • Hands-on analog or mixed-signal circuit design experience earlier in your career - you have designed, simulated, and/or laid out analog circuits yourself and can engage designers from lived experience.

  • Familiarity with the Virtuoso custom/analog ecosystem and the broader custom IC design flow.

  • Experience with AI/ML-assisted design tools and modern design-productivity approaches.

  • Experience with EDA or software commercial models (subscription, term, and consumption-based licensing).

  • Prior people-management experience building and coaching a product management team.

  • MBA or equivalent commercial experience is a plus.

The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
368,657 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account
Free forever. No card. Under a minute.

Recommended for you based on this role

Similar stack
Same company
San Jose
In office • Full-Time • 10+ years exp • Master's Degree • Shanghai
Perl
SystemVerilog
Verilog
Chips/EDA
Cadence Palladium
Cadence Protium
Apply
$78k – $208k per year (Estimated) • In office • Full-Time • 10+ years exp • Bachelor's Degree • Cork
SystemVerilog
Verilog
Chips/EDA
Formal Verification
Apply
$72k – $183k per year (Estimated) • Equity • In office • Full-Time • 12+ years exp • Bachelor's Degree • Dublin
Apply
$29k – $100k per year (Estimated) • In office • Full-Time • 2+ years exp • Bachelor's Degree • Belo Horizonte
C#
C++
Java
Rust
AI/ML
Claude
Claude Code
Copilot
AI Agents
DevOps
Git
GitHub
Apply
$65k – $120k per year • Equity • In office • Full-Time • High School Diploma • Montreal
Perl
Python
Ruby
SystemVerilog
Verilog
Chips/EDA
Formal Verification
UVM
Apply
$78k – $130k per year • In office • Full-Time • 4+ years exp • Bachelor's Degree • Cary • San Jose
Analytics
Power BI
Apply
$147k – $265k per year (Estimated) • In office • Full-Time • Folsom • San Jose
Apply
$117k – $255k per year (Estimated) • In office • Full-Time • 8+ years exp • Richardson • Boise • Folsom • San Jose
Verilog
AI/ML
Claude
Apply
$124k – $208k per year • In office • Full-Time • 2+ years exp • Bachelor's Degree • Austin • San Jose
C++
Python
SystemVerilog
Chips/EDA
Formal Verification
Apply
$116k – $253k per year (Estimated) • In office • Full-Time • Bachelor's Degree • Boise • San Jose
Apply
See all jobs
This is one of many
368,657 more open roles from verified company boards, updated every day.