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Location
In office (Seoul)
Seniority
Staff · 6+ years exp
Employment
Full-Time
Overview
Company
Impact
Profile match
Semiconductor Engineering is a technical media and research organization based in San Jose, California, and founded in 2013. The company provides in-depth news, analysis, and technical papers focused on the design, manufacturing, testing, and integration of advanced semiconductor technologies. It operates as a global information hub for chip engineers and industry professionals, offering newsletters, webinars, and specialized research reports.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Candidate is required to work with foundry companies and their mutual customers by providing foundry enablement solution.
  • Playing as Chip-level physical implementation experts in foundry reference flow validation and in-design flow correlation and its validation.
  • Playing as Routing enablement (P&R techfile) experts and its validation
  • Candidate should have overall design flow understanding Sign-off. Physical implementation- and P&R techfile-related issues between customers and corporate R&D are the major responsibility.
  • Providing Cadence physical implementation tool solution in timely manner as a Product Engineer and working closely with customer on site and off site.
  • Interfacing with headquarter R&D and other Product Engineer at difference sites to resolve any technical issues
  • Around 4+ year professional experience (Master's degree) or 6+ year (Bachelor's degree)
  • Mostly worked on the physical implementation (P&R) domain and P&R techfile creation & validation
  • In-depth usage experience on dominant P&R tool (Innovus or ICC)
  • Good hands-on physical implementation area on advanced technology nodes beyond 28nm
  • Good communication skills internally with team members and externally with customers
  • Speaking/writing proficiency in English

We’re doing work that matters. Help us solve what others can’t.

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