ASIC Digital Design, Director - 19215

Job Description and Requirements

Job Title:

• Director of Digital Verification, High speed ethernet IP development

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years building verification environments that actually catch the bugs that matter, the ones that would have delayed tape-out or broken customer trust. You know that verification is not just about coverage metrics, it is about understanding the design deeply enough to know where it will break before it does. You have led teams through complex IP bring-ups, PCIe, CXL, DDR, Ethernet, and you understand that every protocol has its own failure modes and corner cases that only experience teaches you to anticipate.

You think in test plans, not just test cases. You can walk into a design review, ask three questions that nobody else thought to ask, and walk out with a verification strategy that actually maps to risk. You have built teams, not just managed them. You know the difference between a verification engineer who needs direction and one who needs air cover, and you give each what they need.

You are technical enough to review UVM code and architectural enough to shape methodology across multiple projects. At Synopsys, you will lead verification for high-speed Ethernet IP that ships into products across the industry, and the team you build will set the standard for how we verify Interface IP.

What You'll Be Doing

• Lead a team of ASIC verification engineers designing, implementing, and optimizing verification environments for high-speed Ethernet and other Interface IP protocols including PCIe, CXL, DDR, and AMBA
• Own the technical direction and execution of verification strategy at both block level and full chip integration, making the calls on what gets verified when and how deeply
• Build and refine verification methodologies, incorporating AI-driven automation tools to improve efficiency, reduce manual effort, and close coverage faster
• Create and track detailed test plans that map to real design risk, not just spec checkboxes, and drive them through execution and closure
• Manage project timelines, resource allocation, and risk mitigation across multiple concurrent IP development efforts to deliver on schedule and within scope
• Collaborate directly with RTL design and architecture teams to identify, root-cause, and resolve bugs before they reach integration
• Mentor and develop verification engineers in UVM best practices, SystemVerilog techniques, and how to think like an attacker when writing tests

The Impact You Will Have

• Ensure Synopsys delivers high-speed Ethernet IP that meets spec, passes customer validation, and ships without silicon respins
• Shape the verification methodology and tooling strategy that will scale across the entire Interface IP portfolio
• Build a verification team culture that values technical depth, ownership, and continuous improvement over checkbox engineering
• Accelerate time to market for IP products by catching integration issues early and driving coverage closure systematically
• Influence the technical direction of IP development by surfacing design issues during verification that lead to better architectures
• Establish Synopsys as the standard for verification excellence in high-speed Interface IP across the semiconductor industry
• Enable customers across automotive, data center, and AI markets to build products on IP they can trust

What You'll Need

• 15+ years of hands-on experience in ASIC digital verification, with deep expertise in at least two Interface IP protocols such as PCIe, CXL, DDR, Ethernet, or AMBA (CHI, AXI, AHB, APB)
• Proven track record leading verification teams through full IP or chip development cycles from architecture through tape-out
• Strong technical proficiency in SystemVerilog, SVA, and UVM methodologies, with the ability to review code and architecture at a detailed level
• Solid understanding of the full digital ASIC and IP development flow, including RTL design, synthesis, timing, and how verification fits into the broader workflow
• Experience with industry-standard simulation tools such as VCS, ModelSim, or equivalent, and familiarity with formal verification and emulation is a plus
• Strong analytical and problem-solving skills with a demonstrated ability to tackle complex, ambiguous verification challenges and drive them to resolution
• Excellent communication skills with the ability to influence cross-functional teams, present technical strategies to leadership, and collaborate effectively with design, architecture, and product teams

Who You Are

• You can explain a complex verification gap to a design lead in two sentences without losing the technical nuance, and you know when to escalate and when to solve it yourself
• You are comfortable making technical trade-offs under pressure, choosing between depth of verification and schedule, and explaining the risk clearly to stakeholders
• You build trust with your team by being technically credible, not just organizationally senior, and they come to you because you help them solve hard problems
• You do not wait for perfect information or consensus to move forward, you assess risk, make a call, and communicate the reasoning transparently
• You push back when a test plan is too shallow or a coverage model misses the real risk, and you do it in a way that makes the team better
• You stay current on verification trends, tools, and techniques, and you bring new ideas into the team without chasing every shiny object

The Team You'll Be Part Of

You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.