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Salary
≈ $27k – $62k per year (Estimated)
Location
In office (Hsinchu)
Seniority
Principal · 15+ years exp

Confirmed on the employer's own hiring board on Oct 19, 2026. First seen by Alion on Sep 26, 2026. Synopsys scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Synopsys is an American software company founded in 1986 that supplies electronic design automation tools used to design and verify integrated circuits, together with a large portfolio of licensable semiconductor IP such as interface, memory and processor blocks. Its 2025 acquisition of Ansys added engineering simulation software for structures, fluids and electromagnetics, while it sold its application security business, now Black Duck, in 2024. Listed on Nasdaq, it hires applications engineers, SoC solutions engineers and R&D staff in the United States, India and Vietnam. The company is headquartered in Sunnyvale, California, United States.

Job Description and Requirements

About Synopsys:

At Synopsys, we drive the innovations that shape how we live and work-self-driving cars, artificial intelligence, cloud computing, 5G, and the Internet of Things. As a leader in advanced chip design and software security technologies, we empower the Era of Smart Everything. If you share our passion for innovation, we invite you to join our team.

About Silicon IP:

Our Silicon IP business enables customers to integrate advanced capabilities into SoCs quickly and efficiently. We offer the industry’s broadest portfolio of silicon IP, including logic, memory, interfaces, analog, security, and embedded processors. Our solutions help customers meet unique application requirements and accelerate differentiated product delivery with reduced risk.

Job Responsibilities:

  • Develop verification strategies and plans for ASIC/SoC projects
  • Define and implement testbench architecture and methodologies
  • Build testbench infrastructure and verification components
  • Create verification item lists, coverage models, and checkers
  • Provide clear, metric-driven reports on verification progress
  • Break down tasks, develop schedules, and manage deliverables
  • Lead and coordinate design review meetings
  • Serve as a technical expert and mentor within the team

Key Qualifications:

  • Bachelor’s or Master’s degree in Electrical Engineering (BSEE/MSEE) with 15+ years of relevant experience
  • Extensive hands-on experience creating test environments from functional specifications using UVM/VMM/OVM
  • Proven expertise in constraint random verification, coverage closure, and failure analysis
  • Proficiency in SystemVerilog, UVM, and object-oriented verification methodologies
  • Experience with Verilog/SystemVerilog coding and simulation tools
  • Solid understanding of SoC/ASIC design flows and backend processes
  • Knowledge of one or more interface protocols: DDR, PCIe, AMBA (AMBA2, AXI, CHI), SD, eMMC, Ethernet, USB, MIPI
  • Experience working in Unix environments
  • Strong English communication skills, both written and verbal
  • Ability to work independently, drive innovation, and solve complex problems
  • Strong team player with excellent interpersonal skills

Preferred Qualifications:

  • Experience with formal verification techniques
  • Knowledge of C/C++, Perl, Python, and TCL scripting
  • Understanding of firmware or embedded software development
  • Experience with functional safety standards (ISO26262, FMEDA)

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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