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Salary
≈ $57k – $128k per year (Estimated)
Location
In office (Yongin)
Seniority
Staff · 9+ years exp

Confirmed on the employer's own hiring board on Oct 5, 2026. First seen by Alion on Oct 3, 2026. Synopsys scores A on the Alion truth index.

Overview
Company
Impact
Profile match
Synopsys (NASDAQ: SNPS) is a premier American multinational technology corporation and the global leader in Electronic Design Automation (EDA), semiconductor intellectual property (IP), and software security and quality solutions. Headquartered in Sunnyvale, California, and led by CEO Sassine Ghazi, Synopsys operates on a B2B enterprise software, proprietary semiconductor IP licensing, and silicon engineering services model.

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years deep in the trenches of physical verification, and you know that a clean signoff is never just about running a deck. It is about understanding what the foundry actually meant in that spec, what the customer is trying to build, and where the tool will break if you do not catch it first. You have debugged enough DRC violations and LVS mismatches to know that the answer is rarely in the error message. It is in the layout, the process node quirks, or a rule interpretation that nobody wrote down.

You are comfortable sitting with a customer's design team, walking through a tapeout blocker, and leaving with a plan that works. You do not wait for perfect documentation. You read the foundry PDK, test it in ICV or Calibre, script a solution in Python or TCL, and move. You have a point of view on how verification flows should scale, and you are not afraid to push back when a methodology does not make sense or a release timeline is built on hope instead of reality.

At Synopsys, you will work directly with the semiconductor companies building the next generation of chips, and what you deliver will determine whether they tape out on time or spend another month in verification hell.

What You'll Be Doing

  • Review customer and foundry specifications to develop, enhance, and maintain ICV rule decks and methodologies for DRC, LVS, PERC, ESD, and other physical verification requirements
  • Serve as the primary technical interface between customers, foundries, R&D, and product engineering teams to translate requirements, drive feature implementation, and resolve complex verification issues
  • Lead project planning and execution by aligning resources, schedules, risks, and deliverables to achieve high-quality releases and meet customer tapeout milestones on time
  • Drive continuous improvement of tools, runsets, and verification methodologies through automation, scripting in Python, TCL, Perl, or Shell, and scalable development frameworks
  • Provide technical leadership by making architectural decisions, proposing solutions for advanced node and 3DIC challenges, conducting technical reviews, and mentoring team members
  • Conduct technical presentations, workshops, training sessions, and product demonstrations to promote best practices and advanced verification methodologies to customers and foundries
  • Collaborate across Synopsys product teams to evaluate, validate, and deploy new ICV features that enhance runset quality, improve productivity, and ensure interoperability across the signoff ecosystem

The Impact You Will Have

  • Enable successful customer tapeouts by delivering high-quality physical verification solutions and signoff methodologies that actually work under real-world design constraints
  • Accelerate customer productivity through optimized verification flows, automation, and scalable runset development practices that reduce turnaround time
  • Strengthen customer and foundry partnerships through technical leadership, responsive support, and trusted execution that makes you the go-to engineer when things get hard
  • Drive adoption and expansion of Synopsys physical verification technologies across advanced node, 3DIC, HBM, ESD solutions, and emerging semiconductor designs
  • Influence product direction and future innovations through customer feedback, technology assessments, and cross-functional collaboration with R&D and product management
  • Improve quality, scalability, and release predictability by establishing robust development processes and driving strategic enhancements across products and methodologies

What You'll Need

  • BSc in Electrical Engineering or equivalent with at least 9 years of relevant experience, or MSc with at least 7 years of experience
  • Thorough understanding of physical verification and hands-on experience with at least one physical verification tool like ICV, Calibre, PVS (Pegasus), or other ESD tools
  • Extensive knowledge and hands-on experience in runset development for DRC, LVS, PERC, or ESD across multiple process nodes
  • Excellent proficiency in Python, Perl, Shell, or TCL scripting language for automation and verification flow development
  • Understanding of customer requirements from a physical design perspective, including layout, timing closure, and signoff constraints
  • Hands-on experience with software development processes including project planning, version control systems like Git, and bug tracking tools
  • Excellent teamwork and communication skills, with the ability to work effectively across global teams and time zones

Who You Are

  • You can take a 200-page foundry design rule manual, a customer's failing layout, and a tight deadline, and deliver a working solution without losing your mind or the details
  • You are comfortable explaining a complex LVS mismatch to a customer's layout team in terms they understand, and then turning around and filing a precise bug report for R&D with reproducible steps
  • You manage multiple customer projects simultaneously without dropping threads, mixing up runset versions, or missing a tapeout milestone
  • When a new EDA feature ships, you do not wait for documentation. You test it, break it, figure out where it fits, and decide whether it is ready for customer deployment
  • You push back when a project plan does not account for foundry spec changes, tool limitations, or the reality of how long verification actually takes
  • You see automation as a necessity, not a nice-to-have. If you are doing something manually more than twice, you script it

The Team You'll Be Part Of

You will join a dynamic Product Engineering team based in South Korea, dedicated to supporting leading semiconductor companies in their design and verification processes. The team collaborates closely with R&D, product management, and sales, ensuring customers receive the highest level of technical support and guidance. Together, you will play a crucial role in advancing Synopsys' technology adoption and driving customer success in a rapidly evolving industry.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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