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Salary
≈ $100k – $196k per year (Estimated)
Location
In office (Santa Clara)
Seniority
Middle · 3+ years exp

Confirmed on the employer's own hiring board on Oct 10, 2026. First seen by Alion on Jul 21, 2026.

Overview
Company
Impact
Profile match

Change the world. Love your job.

The Battery Charging Products group at Texas Instruments is looking for a candidate that is interested in working in a challenging, fast-paced environment. As a digital design engineer, you will help architect new TI battery charger products and make our customers’ visions a reality. You will define, design, model, and document digital cores for battery management devices. We are looking for a self motivated, highly driven digital designer to make an immediate impact on current developments, and help us grow market share in a competitive, constantly changing market.

TI offers an extraordinary culture, competitive benefits, professional development opportunities and collaboration coupled with a social responsibility. A career at TI provides the chance to work with some of the world's most dynamic technologies that help people learn, grow, connect and discover.

Some of your responsibilities will include:

  • Defining, designing, and verifying digital cores of battery charger ICs
  • Collaborating with systems and analog engineers to define architecture of digital core
  • Participating in design reviews and creating the necessary design and product documentation
  • Supporting multiple projects concurrently
  • Improving design methodology
  • Creating verification plans from datasheets, input from systems engineers, and customer feedback
  • Performing required simulations and analysis to ensure spec compliance and superior performance at a competitive cost
  • Developing and maintaining simulation models for digital and analog blocks
  • Evaluating device operation and performance in lab

Minimum Requirement:

  • B.S. in Electrical Engineering or related field
  • 3+ years of relevant work experience

Preferred Qualifications:

  • RTL design, preferably Verilog/Systemverilog.
  • Ability to implement digital core from synthesizable RTL to GDSII.
  • Ability to robustly verify these implementations from both a functional and timing standpoint.
  • Ability to implement digital core to facilitate future spins by changing only metal layers.
  • Experience with digital design tools (Cadence).
  • Excellent self-organizing and time management skills.
  • Knowledge of scripting and programming languages such as Python a plus.
  • Knowledge of UVM a plus.
  • Knowledge of VAMS and digital modeling a plus.
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