Firmware validation Engineer (Networking)

UST Title: Lead I - Semiconductor Product Validation

Who we are:

At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in over 25 countries, we build for boundless impact-touching billions of lives in the process. Visit us at UST.com.

Job Description:

Design, develop, and execute validation strategies for next-generation silicon, SoCs, ASICs, and datacenter products across pre-silicon and post-silicon environments.

Validate hardware, firmware, software, and platform features to ensure product functionality, performance, reliability, and quality.

Develop and maintain automated test frameworks, validation tools, and regression suites to improve test coverage and execution efficiency.

Perform system-level validation of networking, storage, BMC, PCIe, Ethernet, telemetry, and platform management features.

Collaborate with architecture, design, firmware, software, and hardware teams to identify requirements and define validation methodologies.

Investigate, debug, and perform root cause analysis of silicon, firmware, and system-level issues using logs, traces, debuggers, and hardware tools.

Validate features across emulation, simulation, FPGA, pre-production silicon, and production silicon platforms.

Support datacenter platform bring-up, qualification, release readiness, and customer scenario validation.

Drive quality improvements through defect tracking, failure analysis, test optimization, and continuous integration validation.

Key Responsibilities:

Create and execute comprehensive validation plans, test cases, and qualification matrices for pre-silicon and post-silicon validation activities.

Validate BMC, networking, PCIe, Ethernet, reset, power management, telemetry, and firmware features on silicon and datacenter platforms.

Develop and enhance automation frameworks using scripting languages such as Python to support functional, regression, and stress testing.

Perform platform bring-up and feature validation on simulation/emulation platforms.

Analyze failures, debug hardware and firmware issues, identify root causes, and drive defects to closure with engineering teams.

Verify firmware, software, and silicon fixes through regression testing and end-to-end feature validation.

Apply networking fundamentals including TCP/IP, Ethernet, switching, link management, packet flow, and performance validation during testing activities.

What we believe:

We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone to champion diversity and inclusion and to place people at the centre of everything we do.

Humility: We will listen, learn, be empathetic and help selflessly in our interactions with everyone.

Humanity: Through business, we will better the lives of those less fortunate than ourselves.

Integrity: We honour our commitments and act with responsibility in all our relationships.

Equal Employment Opportunity Statement

UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation. All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law. UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.

• To support and promote the values of UST.

• Comply with all Company policies and procedures