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Design Verification Engineer- AI Accelerator

Velaura • 2 months ago
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Salary
$200k – $300k per year
Location
In office (Santa Clara)
Employment
Full-Time

Confirmed on the employer's own hiring board on Sep 30, 2026. First seen by Alion on Aug 19, 2026.

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Velaura

Velaura AI, Inc., formerly Auradine, builds ultra-low-power compute solutions for data center, edge, and physical AI applications.
velaura.ai • HQ: Campbell, United States • 201-500 employees
Tech stack of Velaura

Role Overview

We are looking for talented Design Verification Engineers to help verify and deliver Velaura's next generation Physical AI SoC. You will work closely with architects, RTL engineers, software engineers and system teams to establish confidence in the correctness, performance, reliability and safety of the design, from individual RTL blocks through complete hardware and software systems running real workloads.

This role focuses on our AI acceleration units. We are designing custom compute engines from scratch to deliver industry leading inference performance at best in class energy efficiency, and every gain has to come inside a tight power envelope. You will own verification of the hardware that makes those numbers real, where correctness means numerical behavior as much as protocol.

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