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Salary
$117k – $185k per year
Location
In office (Tempe)
Seniority
Junior · 2+ years exp
Visa
H-1B filings in 12 months: 32 · for this role: 2 · green card filings: 19

Confirmed on the employer's own hiring board on Oct 28, 2026. First seen by Alion on Jul 10, 2026. Viasat scores B on the Alion truth index.

Overview
Company
Impact
Profile match
Headquartered in Carlsbad, California, Viasat is a global communications company specializing in high-speed satellite broadband, secure networking, and defense communications services. The company designs, builds, and operates an advanced network of high-capacity satellites to deliver reliable connectivity to residential, commercial, aviation, and government users worldwide. Following its acquisition of Inmarsat, its expanded portfolio now spans global mobile satellite services, maritime communications, and critical national security infrastructure.
About us

One team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.

What you'll do

As a FPGA Engineer on the Space Infrastructure team, you will design, implement, and deliver high speed signal-processing algorithms, cryptography, and/or network protocols in FPGAs. You will be involved in the full design phase, starting from the requirements phase to documentation, block diagrams, implementation of source code, simulation, place and route, testing in hardware, and integration. You will assist other engineers from different fields and must be capable of working in both a small team setting and a larger team setting. You will be able to use your engineering knowledge to support the next generation of advanced communications products and systems

The day-to-day

  • Contribute to architecture, design, and implementation of FPGA based digital systems
  • Develop RTL in Verilog, SystemVerilog, or VHDL for control, data processing, and communication functions
  • Integrate and deploy designs on FPGA and FPGA SoC platforms
  • Collaborate with team members to jointly develop high-speed digital signal processing and waveform processing algorithms supporting satellite communications applications
  • Support bring up, integration, and debug in the lab using logic analyzers, scopes, and other instrumentation
  • Participate in system level trade studies, FPGA utilization, design and code reviews
  • Maintain and control FPGA code revision history
  • Create clear documentation and support test, validation, and production efforts
  • Work autonomously with little instruction to solve well-defined problems

What you'll need

  • Bachelor Degree in Electrical Engineering, Computer Engineering or a related field
  • 2+ years FPGA design experience, including Xilinx Vivado
  • Strong knowledge of System Verilog and/or VHDL
  • Experience with RTL design for various signal processing blocks
  • Experience designing and coding for re-use, maintainability and scalability
  • Ability to read schematics and work closely with hardware design teams
  • Good oral and written communications skills
  • US citizenship
  • Ability to travel up to 10%

What will help you on the job

  • MSEE degree preferred
  • Experience with lab equipment including logic analyzers, DMM, spectrum analyzers
  • Experience with high-speed interfaces like SERDES, DDR2/3/4, LVDS
  • Experience with Programmable Logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify
  • Familiarity with TCL, Perl, Python or another scripting language
  • Familiarity with FPGA modules simulation and testbench development
  • Experience and familiarity with Linux-based development environments
  • Experience with GitHub • Experience with Matlab
  • Familiarity with CI/CD practices • Familiarity with AI Agents (Claud Code, Copilot, etc.)
  • Strong troubleshooting skills
  • Understanding and knowledge of Satellite communication waveforms and standards

Salary range

$117,000.00 - $185,000.00 / annually.

For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $145,000.00- $218,000.00/ annually

At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat’s comprehensive benefit offerings that are focused on your holistic health and wellness at https://careers.viasat.com/benefits.

EEO Statement

Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.

  • Contribute to architecture, design, and implementation of FPGA based digital systems
  • Develop RTL in Verilog, SystemVerilog, or VHDL for control, data processing, and communication functions
  • Integrate and deploy designs on FPGA and FPGA SoC platforms
  • Collaborate with team members to jointly develop high-speed digital signal processing and waveform processing algorithms supporting satellite communications applications
  • Support bring up, integration, and debug in the lab using logic analyzers, scopes, and other instrumentation
  • Participate in system level trade studies, FPGA utilization, design and code reviews
  • Maintain and control FPGA code revision history
  • Create clear documentation and support test, validation, and production efforts
  • Work autonomously with little instruction to solve well-defined problems
  • Bachelor Degree in Electrical Engineering, Computer Engineering or a related field
  • 2+ years FPGA design experience, including Xilinx Vivado
  • Strong knowledge of System Verilog and/or VHDL
  • Experience with RTL design for various signal processing blocks
  • Experience designing and coding for re-use, maintainability and scalability
  • Ability to read schematics and work closely with hardware design teams
  • Good oral and written communications skills
  • US citizenship
  • Ability to travel up to 10%
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