Power Engineer
Confirmed on the employer's own hiring board on Nov 7, 2026. First seen by Alion on Nov 3, 2026.
Job Description
Role Purpose
You will own the power-analysis flows that a large silicon team uses to estimate and sign off power on its SoCs, from RTL to gate level. You will develop and release in-house tools built around Synopsys power tools, support the design teams that run them, carry out power studies on full-chip designs, and work with Synopsys on tool issues. The team also uses AI agents to launch runs, debug failures and write reports, and you will maintain and extend them.
Responsibilities
Develop, maintain and release in-house Python and Tcl wrappers around Synopsys PrimePower, PrimeTime PX, PrimePower RTL and RTL Architect, covering gate-level power (averaged, time-based, glitch and vectorless) and RTL power.
Own the release cycle: versioned releases, release notes, user guides and tutorials, fixes to released versions, and user support in internal Q&A forums.
Keep the nightly regression suites passing on reference designs across process nodes, and add a test for every fix.
Support design teams' power runs: set up inputs (netlist, SDC, SPEF, UPF, libraries, activity files), debug failed runs, and judge whether results can be trusted (annotation coverage, choice of activity window, comparison with earlier design milestones).
Run power studies on large designs, for example a campaign of more than 100 tests on a full-chip network-on-chip. Derive metrics such as energy per byte, per-block and per-power-domain attribution, clock-gating efficiency, and glitch and leakage breakdowns.
Find the root cause of tool, library and flow problems, such as memory power rails, power-switch definitions and PDK updates. Build small testcases and work with Synopsys support and R&D.
Produce power data for others: power-tracker spreadsheets, dashboards, and power maps for thermal and IR-drop tools.
Build and maintain AI-agent automation for the power team: launching and monitoring runs, analysing failures, checking inputs before expensive runs, and filing bugs automatically.
Mandatory Skills: Silicon Validation.Experience: 8-10 Years
.The expected compensation for this role ranges from $100,000 to $180,000 .Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options. Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law. Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.