Overview
Technical skills
Roles

Overview

Senior embedded firmware engineer focused on real-time user-space SDR streaming and signal-processing plumbing. The strongest proven skill is designing low-latency producer-consumer data paths with atomic ring buffers and short realtime libhackrf callbacks, as shown in fifo.c and receive3.c/transmit3.c. There is no evidence of MCU register-level drivers, power management or automated tests and on-device watchdog or OTA/CI infrastructure is not present.

Technical skills

C• Senior
C++• Senior • 16y+ • 5+ projects
Python• Senior • 9y+ • 5+ projects
C
Embedded C
Pthreads
Databases
SQLite• 1 project
Senior Embedded Engineer Confidence: Medium Firmware Engineer
Senior embedded firmware engineer focused on real-time user-space SDR streaming and signal-processing plumbing. The strongest proven skill is designing low-latency producer-consumer data paths with atomic ring buffers and short realtime libhackrf callbacks, as shown in fifo.c and receive3.c/transmit3.c. There is no evidence of MCU register-level drivers, power management or automated tests and on-device watchdog or OTA/CI infrastructure is not present.
Embedded & Firmware
6/10
Low-level device code
Real-time user-space firmware-style code: short libhackrf callbacks, atomic state and lock-free FIFO usage, and explicit realtime scheduling indicate good ISR discipline and concurrency awareness.
Hardware-Software Interface
5/10
Connecting code to hardware
Hardware-software interface implemented against libhackrf/liquid-dsp APIs with error-handling and gain control logic; this is solid host-side driver integration but not register-level device driver work.
Resource Constraints
2/10
Working with limited resources
Some resource-aware decisions (large FIFO sizing, alignas for cache alignment), but no linker scripts, measured RAM/flash budgets, or quantified power measurements.
Real-time & Timing
5/10
Precise timing control
Real-time and timing care is visible via SCHED_FIFO switching and buffer/warmup calculations; however user-space usleep loops are used for waiting which is delay-driven and can introduce jitter.
HDL & Circuit Logic
Designing digital circuits
Not evidenced in public code
Reliability & On-device Testing
3/10
Testing on real hardware
Basic reliability measures exist such as Reed-Solomon header correction, framesync reset on errors and conservative shutdown sequences, but there is no watchdog, OTA rollback, or HIL/CI evidence.
Expertise
Peripheral Interfaces & Drivers• Middle
Firmware• Middle
Industries
Hardware• Middle
Telecommunications• Middle
Technologies
C• Senior
Pthreads
Embedded C
Recommendations
  • Build high-throughput host-side drivers and streaming pipelines for RF peripherals (libhackrf-style callbacks and lock-free FIFOs).
  • Develop and harden realtime data-paths for SDR or audio devices, focusing on minimizing callback latency and jitter and replacing usleep busy-wait loops with event-driven waits where possible.
  • Add on-device reliability and validation: HIL or emulated-target tests, watchdog integration, and CI pipelines to exercise streaming under load.
Repositories
The developer's experience in this domain has been verified based on AI analysis of the following repositories: