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MicroZed Chronicles: A Look at the Artix-7-Based xSDR
FPGA Horizons London- October 6th and 7th 2026 - get Tickets here. The $99 Artix UltraScale+ Explorer Board - learn more here I think, for the good of my bank account and my accountant's sanity, I am going to have to block Crowd Supply on my company netwo
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MicroZed Chronicles: Creating Image Processing with Simulink
One of the things I have been meaning to write about for a while now is an update to the Alinx Versal AI Edge 2302 VD100 development board project, which displayed a test pattern on an attached LCD display.The update to the project was to include an Alinx
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MicroZed Chronicles: Boundary Scan
Recently we have been developing numerous boards based around AMD devices from our Spartan 7 and RPI2040 based embedded system board, to the embedded system tile, the carrier card and several other customer boards which are based on Kria K26 modules. Ther
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UK FPGA Conference
A few days ago, I posted on LinkedIn, X, and Reddit/fpga about the idea of hosting a UK FPGA conference later in the year. I believe there is a need for such an event, as there are several very successful ones in Germany (FPGA Conference), Norway (FPGA Fo
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MicroZed Chronicles: CORDIC algorithm in RTL.
Recently I retired my old trusty TI85 calculator and replaced it with a more modern scientific calculator, which could even run python. Doing this reminded me of the CORDIC algorithm, which was developed by Jack Volder in 1958 and enabled the first scient
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MicroZed Chronicles: Linear Feedback Shift Register
As a follow on from last week, one of the techniques I like to use to stimulate or capture data in our FPGA designs is a Linear Feedback Shift Register (LFSR).In the ten-plus years of this blog, I have never talked much about LFSRs, so I am going to focus
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Deep Dive on Altera Agilex 5 Architecture.
In our previous article, we introduced the Altera Agilex 5 FPGAs. In this article, we delve deeper into three key aspects of the Agilex 5 logic architecture: clocking, ALM (Adaptive Logic Modules), and DSP (Digital Signal Processing) elements. These form
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MicroZed Chronicles: Debugging with Analog Discovery & Python
One of the things I want to take a look at over the next few blogs is how we can use test equipment and ILAs in more advanced use cases to help debug and commission our FPGA developments. Over the next few weeks, we'll be looking at how to generate and ca
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MicroZed Chronicles : Model Composer, AI Engines and Signal Processing.
Regular readers of this blog will know I am big fan of working with higher levels of abstract to develop our programmable logic designs. They will also know that I am also a champion of model based design, using Matlab and Simulink.One of the easiest ways
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