Overview
Technologies
Salaries
Products
People
Growth
Offices
Jobs
Financials

Tech stack

Technologies named in job postings at VISMAY TALENT over the last 12 months, by layer, with the share of postings for each.
Technologies in use
7
Postings analysed
2
Stack modernity
73/100
Languages
SystemVerilog
Perl
Python
Verilog
Frameworks & libraries
UVM
Developer tools
Cadence Tempus
Synopsys PrimeTime
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Salary insights

Compensation ranges based on this company's open jobs
Median
$37k
Typical range
$37k
Open positions
1
1 Jobs
Senior 100%
Level Jobs Median Typical range
Senior 1 $37k $37k
Highest paying role Senior ASIC Verification Engineer $37k
Normalized to USD per year

Growth

Hiring Momentum
28/100
Slowing
Open positions
2
0 opened / 0 closed in 30 days
Hiring Dynamics 0%
Hiring Focus
The percentage next to each role is its share of the company's job openings over the last 90 days; the arrow shows the shift versus the previous period.
Hardware
100% ▲

Offices

Where the company hires and what each office is for
Cities
2
Hiring now
2
Countries
1
Busiest office
Bengaluru
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Headquarters Builds here Office with open vacancies Tap a pin for the office
Bengaluru India
2 open roles 2 posted in 90 days 100% engineering $37k Avg Salary
hires for Hardware
seen since Sep 2026
Hyderabad India
1 open roles 1 posted in 90 days 100% engineering $37k Avg Salary
hires for Hardware
seen since Sep 2026

Jobs

$21k – $36k per year (gross) • In office • 5+ years exp • Hyderabad • Bengaluru
Python
Verilog
SystemVerilog
Perl
UVM
Apply
≈ $20k – $49k per year (Estimated) • In office • 6+ years exp • Bengaluru
Synopsys PrimeTime
Cadence Tempus
Apply