System Integration Engineer, SERDES
Confirmed on the employer's own hiring board on Oct 17, 2026. First seen by Alion on Aug 19, 2026. Amazon scores A on the Alion truth index.
Annapurna Labs, as part of Amazon, is looking for an Experienced HW SERDES Engineer to join Annapurna’s SPIV (System Platform Interface validation) team. Our products include the most advanced interfaces and technologies and are widely used across AWS data centers as backbone for Nitro (https://aws.amazon.com/ec2/nitro/), Graviton (https://www.youtube.com/watch?v=WDKwwFQKfSI) and other services. The candidate will own PCIe SERDES qualification and integration across a range of products from pre-silicon to post deployment debugs.
As a member of the SPIV team, you will own End-to-end subset of system PCIe SERDES interfaces across range of products through product life cycle:
1. Validation and qualification
2. Integration
3. Deployment and post-deployment support
4. Failure analysis
5. Pre silicon activities for new technologies
As owner, you will set the strategy for PCIe SERDES qualification over multiple platforms, ensure the design worked well and drive complex system debugs involving HW and FW components.
You will define NPI practices and engage in pre-silicon efforts to explore new technologies and mitigate integration risks. You will enhance SERDES qualification results with large scale customer performance analysis to discover SERDES life-cycle issues and mitigate them.
This is a fast-paced, intellectually challenging position, and you will work with thought leaders in multiple areas of technology. We are changing industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities
- Approve future products PCIe SERDES technologies
- Define new products SERDES qualification and validation strategy and lead the execution
- Engage integrations of Annapurna Labs’ products with other vendors PCIe HW components
- Support ongoing integrations of PCIe SERDES in new products
- Lead triage, PCIe SERDES debug and root cause analysis of systems in AWS data centers
- Drive and maintain training, quality documentation and collateral to improve in-fleet operation.
Basic qualifications
- B.Sc. in Electrical / Computer Engineering or equivalent.
- 5+ years of HW Design Experience or in Functional or Electrical Integration/Validation/Debug
- 2+ years’ experience working with SERDES design/Integration/Debug
- Knowledge on High speed interfaces such as PCIe/Multi gig Ethernet /USB 4 etc
Preferred qualifications
- Knowledge of scripting languages (bash, python, etc.)
- Operating PCIe measurement and debug equipment such as scope and analyzers.
- Solid signal integrity knowledge
- Experience with server design and computer systems architecture.
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