Fellow Software Development Engineer, GEMM Optimization
Confirmed on the employer's own hiring board on Oct 20, 2026. First seen by Alion on Sep 2, 2026.
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THE ROLE:
AMD is seeking a Fellow Software Development Engineer to architect and develop features in the tensile-lite assembly code generator for General Matrix Multiplication (GEMM) and GEMM + X (including attention). GEMM performance is one of the most critical levers for AI workload efficiency and this role sits at the center of AMD's effort to deliver best-in-class matrix-multiply performance across current and next-generation hardware.
You will own the deep, hardware-aware optimization work that turns AMD's GPU architecture into delivered performance: understanding the hardware specification at the instruction and pipeline level, partnering directly with hardware architects to influence future designs, and innovating algorithms to extract maximum throughput.
THE PERSON:
This role is a strong fit for an engineer who wants to work at the intersection of GPU microarchitecture, low-level code generation, and applied AI performance - someone equally comfortable reading a hardware spec, writing hand-tuned assembly, and explaining a performance tradeoff to a customer or an architect.
KEY RESPONSIBILITIES
- Analyze AMD GPU hardware specifications in depth and work closely with hardware architects to align kernel design with current silicon capabilities and to influence requirements for future generations.
- Develop support for new ISA and HW/SW optimization features in the code-generator
- Innovate and implement new algorithms for implementing GEMM and GEMM + X
- Profile and root-cause GEMM performance bottlenecks across the stack
- Partner with customers and internal stakeholders to understand real-world workload requirements, reproduce performance issues, and deliver targeted performance
PREFERRED EXPERIENCE:
- Strong command of GPU computer architecture: compute units, register files, cache/LDS hierarchies, memory bandwidth, matrix cores/WMMA-style instructions, and instruction scheduling/latency hiding.
- Deep expertise in GEMM algorithms and their mapping onto GPU hardware (tiling, blocking, register/LDS allocation, wave scheduling, memory hierarchy utilization).
- Strong software engineering fundamentals with a track record of building production-quality, high-performance software.
- Demonstrated experience optimizing GPU compute kernels, ideally GEMM and attention
- Proficiency in C++ and assembly-level GPU programming; working knowledge of Python for tooling/automation.
- Solid understanding of parallel computing, memory hierarchies, and hardware-software performance tradeoffs.
- Clear written and verbal communication skills; ability to work effectively with hardware architects, customers, and cross-functional engineering teams.
- Direct experience with any GPU compiler backend
- Experience with AMD GPU architectures (CDNA/RDNA) or comparable competitive architectures (NVIDIA Hopper/Blackwell, etc.)
- Contributions to industry standards, publications, or patents related to GPU compute or matrix-multiply optimization
PREFERRED ACADEMIC CREDENTIALS:
BS/MS/PHD in CS/CE or related field with deep relevant experience
LOCATION: San Jose, CA
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE:
AMD is seeking a Fellow Software Development Engineer to architect and develop features in the tensile-lite assembly code generator for General Matrix Multiplication (GEMM) and GEMM + X (including attention). GEMM performance is one of the most critical levers for AI workload efficiency and this role sits at the center of AMD's effort to deliver best-in-class matrix-multiply performance across current and next-generation hardware.
You will own the deep, hardware-aware optimization work that turns AMD's GPU architecture into delivered performance: understanding the hardware specification at the instruction and pipeline level, partnering directly with hardware architects to influence future designs, and innovating algorithms to extract maximum throughput.
THE PERSON:
This role is a strong fit for an engineer who wants to work at the intersection of GPU microarchitecture, low-level code generation, and applied AI performance - someone equally comfortable reading a hardware spec, writing hand-tuned assembly, and explaining a performance tradeoff to a customer or an architect.
KEY RESPONSIBILITIES
- Analyze AMD GPU hardware specifications in depth and work closely with hardware architects to align kernel design with current silicon capabilities and to influence requirements for future generations.
- Develop support for new ISA and HW/SW optimization features in the code-generator
- Innovate and implement new algorithms for implementing GEMM and GEMM + X
- Profile and root-cause GEMM performance bottlenecks across the stack
- Partner with customers and internal stakeholders to understand real-world workload requirements, reproduce performance issues, and deliver targeted performance
PREFERRED EXPERIENCE:
- Strong command of GPU computer architecture: compute units, register files, cache/LDS hierarchies, memory bandwidth, matrix cores/WMMA-style instructions, and instruction scheduling/latency hiding.
- Deep expertise in GEMM algorithms and their mapping onto GPU hardware (tiling, blocking, register/LDS allocation, wave scheduling, memory hierarchy utilization).
- Strong software engineering fundamentals with a track record of building production-quality, high-performance software.
- Demonstrated experience optimizing GPU compute kernels, ideally GEMM and attention
- Proficiency in C++ and assembly-level GPU programming; working knowledge of Python for tooling/automation.
- Solid understanding of parallel computing, memory hierarchies, and hardware-software performance tradeoffs.
- Clear written and verbal communication skills; ability to work effectively with hardware architects, customers, and cross-functional engineering teams.
- Direct experience with any GPU compiler backend
- Experience with AMD GPU architectures (CDNA/RDNA) or comparable competitive architectures (NVIDIA Hopper/Blackwell, etc.)
- Contributions to industry standards, publications, or patents related to GPU compute or matrix-multiply optimization
PREFERRED ACADEMIC CREDENTIALS:
BS/MS/PHD in CS/CE or related field with deep relevant experience
LOCATION: San Jose, CA
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.