Senior RTL Design Engineer – FPGA/ASIC Design
First seen by Alion on Nov 5, 2026. AMD scores A on the Alion truth index.
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THE ROLE
AMD is seeking a highly motivated and technically strong Senior Silicon Design Engineer to join our team working on next-generation adaptive computing and silicon technologies.
The successful candidate will contribute to the design, development, integration, and validation of complex FPGA and Adaptive SoC solutions. The role spans RTL/FPGA design, digital signal processing (DSP), and system-level emulation and validation.
The candidate will work closely with cross-functional teams to develop high-performance hardware solutions, optimize system performance, and solve challenging engineering problems across hardware and software domains.
THE PERSON
The ideal candidate is a self-driven engineer with strong digital design fundamentals, excellent analytical and debugging skills, and a passion for developing high-performance silicon solutions.
The candidate should demonstrate technical ownership, the ability to independently solve complex engineering challenges, and a collaborative approach to working with multidisciplinary teams.
We are looking for someone who is eager to explore new technologies, contribute to technical decisions, and mentor junior engineers.
KEY RESPONSIBILITIES
Design, develop, integrate, and validate complex digital hardware solutions targeting FPGA and Adaptive SoC platforms.
Develop and optimize RTL designs using VHDL/Verilog/SystemVerilog, with emphasis on functional correctness, performance, and resource utilization.
Contribute to FPGA implementation activities, including synthesis, PnR, STA, and timing closure.
Develop and optimize DSP algorithms and hardware acceleration solutions using programmable logic.
Participate in hardware-software co-design, embedded system integration, and performance optimization.
Develop and maintain simulation, co-simulation, emulation, and FPGA-based prototyping environments for design and system validation.
Perform system-level debugging, root-cause analysis, and resolution of complex hardware and software integration issues.
Collaborate with architecture, design, verification, firmware, and software teams to deliver high-quality engineering solutions.
Develop automation scripts, validation utilities, and regression frameworks to improve engineering efficiency.
Participate in technical reviews, contribute to architecture and implementation decisions, and identify opportunities for design improvements.
REQUIRED QUALIFICATIONS
Bachelor's or Master's degree in Electrical Engineering, Electronics and Communication Engineering, VLSI, or a related technical discipline with 5- 10 Years.
Strong understanding of digital design fundamentals and FPGA/ASIC design methodologies.
Hands-on experience in RTL design and development using VHDL/Verilog/SystemVerilog.
Experience with FPGA design flows, including simulation, synthesis, implementation, and debugging.
Good understanding of static timing analysis, clock domain crossing, and timing closure concepts.
Programming proficiency in Python & Scripting using Bash/Perl/Tcl.
Strong analytical, debugging, and problem-solving capabilities.
Ability to independently own technical tasks and collaborate effectively across engineering teams.
Good written and verbal communication skills.
PREFERRED QUALIFICATIONS
Experience in one or more of the following areas would be an advantage:
AMD/Xilinx Vivado and Vitis development environments.
AMD Versal Adaptive SoC, AI Engine programming, graph development, and performance optimization.
DSP algorithms, MATLAB/Python modeling, and hardware implementation.
FPGA-based emulation, prototyping, and silicon validation.
Hardware-software co-design and embedded processor-based systems, including ARM and MicroBlaze.
AXI protocols, memory interfaces, and high-speed data movement architectures.
SystemVerilog/UVM-based verification methodologies.
Wireless communication systems, RF signal processing, or high-performance DSP applications.
Linux-based development environments, Tcl/Python scripting, and automated regression frameworks.
Experience with board bring-up, system integration, and hardware debugging.
ACADEMIC CREDENTIALS
B.E./B.Tech or M.E./M.Tech/MS in Electronics, Electrical Engineering, VLSI, or a related field.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
AMD is seeking a highly motivated and technically strong Senior Silicon Design Engineer to join our team working on next-generation adaptive computing and silicon technologies.
The successful candidate will contribute to the design, development, integration, and validation of complex FPGA and Adaptive SoC solutions. The role spans RTL/FPGA design, digital signal processing (DSP), and system-level emulation and validation.
The candidate will work closely with cross-functional teams to develop high-performance hardware solutions, optimize system performance, and solve challenging engineering problems across hardware and software domains.
THE PERSON
The ideal candidate is a self-driven engineer with strong digital design fundamentals, excellent analytical and debugging skills, and a passion for developing high-performance silicon solutions.
The candidate should demonstrate technical ownership, the ability to independently solve complex engineering challenges, and a collaborative approach to working with multidisciplinary teams.
We are looking for someone who is eager to explore new technologies, contribute to technical decisions, and mentor junior engineers.
KEY RESPONSIBILITIES
Design, develop, integrate, and validate complex digital hardware solutions targeting FPGA and Adaptive SoC platforms.
Develop and optimize RTL designs using VHDL/Verilog/SystemVerilog, with emphasis on functional correctness, performance, and resource utilization.
Contribute to FPGA implementation activities, including synthesis, PnR, STA, and timing closure.
Develop and optimize DSP algorithms and hardware acceleration solutions using programmable logic.
Participate in hardware-software co-design, embedded system integration, and performance optimization.
Develop and maintain simulation, co-simulation, emulation, and FPGA-based prototyping environments for design and system validation.
Perform system-level debugging, root-cause analysis, and resolution of complex hardware and software integration issues.
Collaborate with architecture, design, verification, firmware, and software teams to deliver high-quality engineering solutions.
Develop automation scripts, validation utilities, and regression frameworks to improve engineering efficiency.
Participate in technical reviews, contribute to architecture and implementation decisions, and identify opportunities for design improvements.
REQUIRED QUALIFICATIONS
Bachelor's or Master's degree in Electrical Engineering, Electronics and Communication Engineering, VLSI, or a related technical discipline with 5- 10 Years.
Strong understanding of digital design fundamentals and FPGA/ASIC design methodologies.
Hands-on experience in RTL design and development using VHDL/Verilog/SystemVerilog.
Experience with FPGA design flows, including simulation, synthesis, implementation, and debugging.
Good understanding of static timing analysis, clock domain crossing, and timing closure concepts.
Programming proficiency in Python & Scripting using Bash/Perl/Tcl.
Strong analytical, debugging, and problem-solving capabilities.
Ability to independently own technical tasks and collaborate effectively across engineering teams.
Good written and verbal communication skills.
PREFERRED QUALIFICATIONS
Experience in one or more of the following areas would be an advantage:
AMD/Xilinx Vivado and Vitis development environments.
AMD Versal Adaptive SoC, AI Engine programming, graph development, and performance optimization.
DSP algorithms, MATLAB/Python modeling, and hardware implementation.
FPGA-based emulation, prototyping, and silicon validation.
Hardware-software co-design and embedded processor-based systems, including ARM and MicroBlaze.
AXI protocols, memory interfaces, and high-speed data movement architectures.
SystemVerilog/UVM-based verification methodologies.
Wireless communication systems, RF signal processing, or high-performance DSP applications.
Linux-based development environments, Tcl/Python scripting, and automated regression frameworks.
Experience with board bring-up, system integration, and hardware debugging.
ACADEMIC CREDENTIALS
B.E./B.Tech or M.E./M.Tech/MS in Electronics, Electrical Engineering, VLSI, or a related field.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.